It will generate 43Khz sine wave
// ====================
//******************************************************************************
#include <msp430xG43x.h>
//------------------------------------------------------------------------------
// RAM - 12-bit Sine Lookup table with 32 steps
//------------------------------------------------------------------------------
static int Sin_tab[32] = {
2048,
2447,
2831,
3185,
3495,
3750,
3939,
4056,
4095,
4056,
3939,
3750,
3495,
3185,
2831,
2447,
2048,
1648,
1264,
910,
600,
345,
156,
39,
0,
39,
156,
345,
600,
910,
1264,
1648
};
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog
FLL_CTL0 |= DCOPLUS + XCAP18PF; // DCO+ set, freq = xtal x D x N+1
SCFI0 = FLLD_4+FN_4; // x4 DCO freq, 16MHz nominal DCO
SCFQCTL = 63; // (63+1) x 32768 x 4 = 8 MHz
FLL_CTL1 |= XT2OFF;
// For SMCLK
P1SEL |= 0x10;
P1DIR |= 0x10;
// For MCLK
P1SEL |= 0x02;
P1DIR |= 0x02;
ADC12CTL0 = REFON; // Internal ref
DMA0SA = (int) Sin_tab; // Source block address
DMA0DA = (unsigned int)&DAC12_0DAT; // Destination single address
DMA0SZ = 0x20; // Block size
DMACTL0 = DMA0TSEL_5; // DAC12IFG trigger
DMA0CTL = DMADT_4 + DMASRCINCR_3 + DMAEN; // Rpt, inc src, word-word
DAC12_0CTL = DAC12LSEL_2 + DAC12IR + DAC12AMP_5 + DAC12IFG + DAC12ENC;
// Config
// **force first interrupt**
CCTL1 = OUTMOD_3; // Set/reset
CCR1 = 1; // PWM Duty Cycle
CCR0 = 2;
TACTL = TASSEL_2 + MC_1; // SMCLK, up-mode
_BIS_SR(LPM0_bits); // Enter LPM0
}