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MSP430F5659: SPI Prescaler

Part Number: MSP430F5659


Hi,

I am using MSP430f5659 for one of my project. I need to use spi peripheral at 20MHz clock. I have selected 20M crsytal.

From user guide, I understand that if I set the prescaler to 0, then

fBitClock = fBRCLK / UCBRx
If UCBRx = 0, fBitClock = fBRCLK

Which means that I can use 20M crystal and prescaler of 0 to communicate with my slave device. Is my understanding correct. Kindly advice.

Also, will MSP supports spi burst mode. 

Thanks in advance.

  • Yes. UCBRx=0 mean no prescaling and the max input clock (fUSCI) is fSYSTEM(=20MHz in your case). [Ref Data Sheet (SLAS700D) Sec 5.32]

    I'm not familiar with the term "SPI burst mode". Using 3-pin mode (UCMODE=0, UCSTEM=0) and controlling /CS yourself (as a GPIO), you can have as many bytes as you choose in each transaction. DMA can help keep the pipeline full.

  • Thanks for the prompt reply.

    We can use 4 pin SPI mode right (Is there any issue with this to use CSB pin as GPIO).

    SPI burst mode that I have mentioned is to write an address and then read the incremental data from that address.  For example, we write an address of 0x10 and I start reading the data from 0x10 to 0x20 continuously. 

  • In "4-pin" mode, the SPI unit controls /CS, and you only get one byte per transaction. I recommend 3-pin mode plus separately wiggling the /CS pin as a GPIO; you can use the pin marked "STE" if you want, just don't set the PSEL bit(s) for it and control it using PxOUT.

    The way you describe burst mode sounds like a fairly standard SPI transaction. You just have to send a "dummy" byte to receive each subsequent byte.

  • Thanks for the reply.

    Currently I was planning to use this pin  "P8.4/UCB1CLK/UCA1STE" as 4 pin SPI. I can use 3 pin SPI mode and configure this as GPIO and use it right?

    Will that be an issue. Kindly advice.

  • Yes, I recommend 3-pin+GPIO-CS. (The Slave will see it as 4-pin.) That will allow you to have multi-byte transactions.

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