Part Number: MSP430F5529
Hello,
I'm going through the example code and I see that during the initialization of the clock sources for USCI_B_I2C_initMaster, we pass in a clock source using the SMCLK, which defaults to 1.1 MHz and we ask for an I2C bit rate of 400 kHz.
In the example source, it seems we just divide 10485576 by 400000. That gives a result of 2 for the pre-Scaler.
Wouldn't this set the I2C clock speed to 500 kHz instead of 400 kHz?
Example code is provided below. The struct passed in is
param{selectClockSource = 0x80, i2cClk = 1048576, dataRate = 400000}, baseAddr = 0x05E0
Thanks!
void USCI_B_I2C_initMaster(uint16_t baseAddress, USCI_B_I2C_initMasterParam *param)
{
uint16_t preScalarValue;
//Disable the USCI module and clears the other bits of control register
HWREG8(baseAddress + OFS_UCBxCTL1) = UCSWRST;
/*
* Configure as I2C master mode.
* UCMST = Master mode
* UCMODE_3 = I2C mode
* UCSYNC = Synchronous mode
*/
HWREG8(baseAddress + OFS_UCBxCTL0) = UCMST + UCMODE_3 + UCSYNC;
//Configure I2C clock source
HWREG8(baseAddress + OFS_UCBxCTL1) = (param->selectClockSource + UCSWRST );
/*
* Compute the clock divider that achieves the fastest speed less than or
* equal to the desired speed. The numerator is biased to favor a larger
* clock divider so that the resulting clock is always less than or equal
* to the desired clock, never greater.
*/
preScalarValue = (unsigned short)(param->i2cClk / param->dataRate);
HWREG16(baseAddress + OFS_UCBxBRW) = preScalarValue;
}
