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MSP430F5528: unknown USB device

Part Number: MSP430F5528


Hi, we are bringing up one board using MSP430F5528 for the keyboard application. The code run is from the keyboard demo board(https://www.ti.com/tool/TIDM-KEYBOARD), the only change we made on HW is the XT2 crystal change from 4MHz to 6MHz, and we change the register setting for XT2 as well, nothing else we have changed as of current. After plug our board via USB cable into laptop, the Win10 says unknown USB device(Device descriptor request failed).

I measured XT2 pin, the crystal runs at 6MHz, also measure the USB differential signal, it looks the signal is good. Please advise the possible root cause of the issue?

  • Problem source can be software or hardware related, and it easy to check with using HID BSL supported XT2 (4, 8, 12 or 24 MHz). If device is mass erased, after connecting to PC USB port device should be enumerated automatically as HID BSL, and this is indicator that everything is OK regarding hardware. Unfortunately (don't know why) you chose 6 MHz and USB BSL can't help much in this setup. In my project I always used 24 MHz XT2 (for MCLK also) that is by default supported by HID BSL and TI USB Stack examples.  

  • Hi, then what is the workaround to get over this? (if it cannot automatically enumerated as HID, can we modify code so still can proceed?) as we do not have the crystal you mentioned on hand, and the chip has never been programmed before, it should be default after purchasing.

    Will this issue also occurred in Linux development?

  • This is not OS related problem, and it is hard to debug USB code by breakpoint. Try to find out and modify PLL divider for 6 MHz XT2...

    CLK = 6000000 Hz
    DIVQ = 1    DIVM = 8
    PLLCLK = 48000000 Hz    ACC = 0 ppm
    USBPLLDIVB = 0007h

  • As I am new to the MSP430 and not really SW guy, can you help me to understand below:

    1. Is that 6MHz XT2 still able to perform the keyboard application, just we need to fix the automatic USB HID BSL invoking on the blank chip? Or are you saying the root cause may lie in other place, not the 6MHz crystal? (I doubt the USB signa quality now because we use a very long cable and there is several soldering point in the mid way) 

    2. The PLL divider modification you mentioned should be implmented in where? And are those numbers we can just use or need further debug?

    3. I read a app note "Starting a USB Design Using MSP430™ MCUs", it mentioned:

    The BSL is designed to automatically recognize four frequencies applied to XT2:

    • 4 MHz

    • 8 MHz

    • 12 MHz

    • 24 MHz

    If using BSL for production programming, you must use one of these four frequencies. If using BSL after a

    JTAG session has been performed, you can use that JTAG session to program a modified version of the

    BSL that can recognize your frequency.

    Does above have something to do with this issue? If yes, we can follow this to fix this issue, right?

  • MSP430 hardware USB module can work with 6 MHz XT2, but all TI sources (examples from USB Dev Stack) by default are configured for 4 MHz XT2 (because this one is soldered on LP). Don't remember if there is some GUI tool for easy reconfigure, but for sure XT2 PLL divider commented values can be found in source code.

    Firmware can be uploaded to blank device by SBW / JTAG, and in this case XT2 value is irrelevant because it is not used. Firmware can be also uploaded by MSP430 USB Firmware Upgrade GUI on Win or Phyton CLI by device itself, using factory preloaded HID BSL, but in this case XT2 must be 4, 8, 12 or 24 MHz.

    I used really bad P2P wiring for my MSP430 USB exp board, and never had USB problem because of this.

  • We followed the document TIDU521 "Keyboard Controller using MSP430 ":

    6.1.2 Crystal XT2
    Use a different crystal for the design.
    Instructions:
    1. Modify USB_XT_FREQ_VALUE in:
    .\Projects\Projects\USBKBD\Src\USB_config\descriptors.h

    we changed the XT2 frequency to 6, however it does not work(crystal output 6Mhz, but just unknown USB device reported). So is the change in mentioned 6.1.2 not enough ? Still need to go with the PLL divider change? 

    Appreaciate your look into this. 

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