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MCLK always from DCO

Ant Colon
Prodigy 30 points

Other Parts Discussed in Thread: MSP430F2618

MSP430F2618.  Two 16 MHZ crystal connected to XT and XT2. Capacitors 22pf to GND connected to each XT's pin. Vcc=3.2V. I've changed BCSCTL2 and other registers. If I haven't SMCLK only, programm is stopped ( BCSCTL2 |= 0xC8 ).  ACLK and SMCLK are 16 MHz, but MCLK is 1.081 MHz always. All frequencies measured on pins. How can I config registors to have MCLK from external 16MHz crystal?

WDTCTL = WDTPW + WDTHOLD;             // Stop watchdog timer

__bic_SR_register(OSCOFF);            // Turn On Oscillator
BCSCTL1 = 0xC7;
BCSCTL3 = 0xA4;

IFG1 &= ~(OFIFG);                     // Clear OFIFG
do
for (a=255;a>1;a--) __no_operation();
while ( (IFG1&OFIFG) != OFIFG );      // Re-test OFIFG

BCSCTL2 |= 0x88;

P5SEL |= 0x70;                        // Clocks to P5
P5DIR |= 0x70;

  • 0
    TI__Guru 64920 points

    Ant Colon said:

    MSP430F2618.  Two 16 MHZ crystal connected to XT and XT2. Capacitors 22pf to GND connected to each XT's pin. Vcc=3.2V. I've changed BCSCTL2 and other registers. If I haven't SMCLK only, programm is stopped ( BCSCTL2 |= 0xC8 ).  ACLK and SMCLK are 16 MHz, but MCLK is 1.081 MHz always. All frequencies measured on pins. How can I config registors to have MCLK from external 16MHz crystal?

    The MSP430x2xx Family User's Guide (SLAU144) available on the MSP430F2618 Product Folder in Section 5.2 indicates the default clock source for MCLK is the DCOCLK which is ~1.1MHz.  This appears to be consistent with your observations.

    The diagram in Figure 5-1 indicates the SELMx bit field selects the clock source for MCLK.  You will need to set this bit field the desired clock source (XT2) in your code, which it looks like you are doing with setting BCSCTL2[7:6]=10.  However, your setting of BCSCTL1=0xC7 turns off XT2.

    Section 5.2.7 talks about the fail-safe operation of the clock module and if there is a fault, MCLK will be switched to the DCO.

    Please modify this to see if this addresses your issue.

  • 0 in reply to BrandonAzbell
    Prodigy 30 points

    Thank you Brandon!

    I think about the fail-safe operation of the clock module. Probably there is a fault, but how can I catch it... After setting BCSCTL1,BCSCTL2,BCSCTL3 I try read BCSCTL3 for flags.

         MCLK Source- XT2   Aux   DCO
    BCSCTL1=           #47   #47    #47
    BCSCTL2=           #88   #C8   #08
    BCSCTL3=           #A0  #A0   #A0

    Read BCSCTL3=  #A0  #A0   #A0

    MCLK, MHz=      1.08  1.08   1.08
    SMCLK, MHz=    16.0  16.0  16.0
    ACLK, MHz=       16.0  16.0  16.0

  • 0 in reply to Ant Colon
    Guru 227245 points

    After clearing the fault flags, you have to wait at least 50µs (for the exact values see the device datasheet for the fault detection frequency - the minimum value defines the maximum time after which a fault might be still detected).
    The write tot he flag will reset sort of a monoflop as if it had been triggered by the crystal. Some time needs to pass in which the crystal is not triggering the monoflop, then the fault flag will be set again. If you read BSCTL3 right after writing 0 to the bits, you'll always read them 0.

    On the 5x series, the fault detection is different. There you cannot clear the fault flag at all unless the fault condition has been removed and some time has passed.

    On the 1x and 2x serie, however, you'll have to wait whether the fault flag is coming up again or not.

    Remember: while the demo programs in assembly language simply use a busy-waiting loop for the delay, you cannot reliably do a waiting loop by an empty 'for' statement in C. The compiler will possibly optimize such code by unrolling it or completely removing it if it shows no other significance than wasting time.

  • 0 in reply to Jens-Michael Gross
    Prodigy 30 points

    There was some problems with delays. For sourcing MCLK from crystal I've used MSP430x2xx Family User's Guide, p.5-11. I guess, there is a mistake. So, I have to use delay twice. The first time is after Turn On Oscillator and set up BCSCTL1 and BCSCTL3, the second time is after Clear OFIFG. Otherwise it won't work properly. I'm glad to post correct C code. Thank you for your help!

    ***************************************************************************
    #include "msp430.h"
    #include "msp430x26x.h"
    #include "stdio.h"

    volatile unsigned char a1=0, a2=0;

    int main(void)
    {
      WDTCTL = WDTPW + WDTHOLD;             // Stop watchdog timer
      if (CALBC1_8MHZ ==0xFF || CALDCO_8MHZ == 0xFF)                                    
      { 
      while(1);                             // If calibration constants erased
      }                                     // do not load, trap CPU!!
     
      SVSCTL=0x98;                          // Supply Voltage supervisor (SVS)
                                            // Cause POR on 2,9V
      P5SEL |= 0x70;                        // Clocks on P5.4
      P5DIR |= 0x70;
                                            // Sourcing MCLK from a Crystal
      __bic_SR_register(OSCOFF);            // Turn On Oscillator
      BCSCTL1 = 0x47;
      BCSCTL3 = 0xA0;
      for (a1=40;a1>1;a1--)                 // Delay ~110ms
        for (a2=255;a2>1;a2--)
          __no_operation();     

      IFG1 &= ~(OFIFG);                     // Clear OFIFG

      for (a1=40;a1>1;a1--)                 // Delay ~110ms
        for (a2=255;a2>1;a2--)
          __no_operation();

      BCSCTL2 = 0xC8;                       // MCLK is soursing from Aux
    //  BCSCTL2 = 0x88; for XT2             // MCLK is soursing from XT2

      while ( 1 )
      { ...
      }
    }

  • 0 in reply to Ant Colon
    Guru 227245 points

    Actually the proper sequence (or at least the often used, as there is no 'must' for a specific implementation) is to clear OFIFG, do the delay, then check for OFIFG. If it is set again, repeat. If your applicaiton can live without the crystal (fallback to DCO), then you can implement an emergency exit after a given number of cycles. Else you can panic if it won't stay clear :)
    In my latest projects, I toggle an LED on each cycle and if something's wrong, I cycle forever, teh LED showing me what's wrong. In older projects, I had a fallback to 4MHz DCO isntead of 8MHz crystal. In many cases it was stable enough to still establish the require UART connection, only the timings were a bit off.

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