CCS/MSP430FR2355: Question about VLO and CSCTL8 register

Ryo Akashi

Genius 9470 points

Part Number: MSP430FR2355

Tool/software: Code Composer Studio

Dear experts,

I got question about VLO and CSTL8 register from customer.

Could you give me advice?

Is there good way of VLO clock error correction?

For example, is there any register which can correct clock delay?

In user guide P123, there is description "ACLK clock request enable. Setting this enables conditional module requests for ACLK."

It means this is enabled for only LPM mode?

Also, is it disabled in normal mode?

I would appreciate if you would give me reply.

Thanks and best regards,

Ryo Akashi

over 5 years ago

0 Lixin Chen1 over 5 years ago

TI__Expert 7015 points

Hi, Ryo,

Yes. You can use internal clock source REFO to calibrate the VLO clock to get the accurate VLO frequency. Please refer to following app note for details.

VLO Calibration on the MSP430FR4xx and MSP430FR2xx Family (Rev. A)

The default value of the ACLKREQEN is 1. It is for normal mode and LPM1/2/3 modes. It is to enable the condition module requests for ACLK.

Thanks,

Lixin

0 Ryo Akashi over 5 years ago in reply to Lixin Chen1

TI__Genius 9470 points

Hello Lixin-san,

Thank you for your reply.

Regarding with Quwstion #2, let me ask additional question.

In LPM4 mode, ACLK Clock is not enabled when ACLKREQEN=1?

Also, in Normal mode/SMCLKREQEN=0, the timer operation which is sourced by SMCLK is not working?

Customer said it looks working from seeing actual operation.

I would appreciate if you would give me reply.

Thanks and best regards,

Ryo Akashi

0 Lixin Chen1 over 5 years ago in reply to Ryo Akashi

TI__Expert 7015 points

Hi, Ryo,

In LPM4, ACLK is not working (disabled), even though ACLKREQEN=1. But if there is peripheral to request ACLK, the ACLK will be active and system will not enter LPM4.

In Normal mode/SMCLKREQEN=0, the timer which is sourced by SMCLK should be working. In normal mode, SMCLK can only be gated by SMCLKOFF=1.

The clock request (XXXREQEN=1) means the CS module will enable the clock output when peripherals request the clock, regardless of the LPM settings.

Please refer to chapter 3.2.12 in user's guide (slau445) for details.

Thanks,

Lixin

0 Lixin Chen1 over 5 years ago in reply to Lixin Chen1

TI__Expert 7015 points

Hi, Ryo,

Does my post help to resolve your issue?

Thanks,

Lixin

0 Ryo Akashi over 5 years ago in reply to Lixin Chen1

TI__Genius 9470 points

Hello Lixin-san,

Thank you very much for your support.

I already told your advice to customer, but I don't get feedback yet.

I think your post help to resolve this question.

If I got additional question, let me ask you again.

Thanks and best regards,

Ryo Akashi

0 Lixin Chen1 over 5 years ago in reply to Ryo Akashi

TI__Expert 7015 points

Hi, Ryo,

If so, could you help to click on "resolved" button?

Thanks,

Lixin

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CCS/MSP430FR2355: Question about VLO and CSCTL8 register