Part Number: MSP430FR5964
Other Parts Discussed in Thread: MSP430F5328
Tool/software: Code Composer Studio
Dear Champs,
I am asking this for our customer.
The user has used MSP430F5328 on IAR for MSP430 V5.40.3 well for long time.
They have fixed interrupt vector address/routine of a certain ISR for over-the-air download to avoid erasing the related memory block/address for this ISR or neighboring ISR like this:
__interrupt void ADC12_ISR(void)@"ADC12_ADDRESS"
Now, they are upgrading and migrating the codes from F5328 on IAR for MSP430 V5.40.3 onto FR5964 on CCS 10.1.
Questions:
1) They find there will be errors if they compile with "@"ADC12_ADDRESS"" on CCS 10.1. They wonder how this can be done with CCS 10.1? That is, they could do this on IAR and want to know how to do it on CCS 10.1.
2) We find in the below app note, it says
"2.2.3 Interrupt Vectors in FRAM Devices
FRAM does not have the limitation of a minimum erase size, so all interrupts can be reprogrammed in FRAM devices without risking erasure of the reset vector. By default, MSP430FRBoot enables protection of the bootloader area using MPU, but this feature is disabled while reprogramming interrupt vectors."
Does that mean with FRAM devices, the user does not need to fix the interrupt vector table/routine for the over-the-air downloading/updating? Or this description has nothing to do with our purpose? Would you please help clarify the above description in more detail?
See P11 of
Wayne Huang
