Part Number: MSP430F5529
Hello everyone, I would appreciate your thoughts with a strange UCS behavior:
We have a design using a MSP430F5529 with only a 24MHz XTAL connected to XT2. We manufactured dozens of boards and all work fine, except a very few that does not boot properly. With some investigation I found that the firmware crashed just after the SELM_5 bits were set in the UCSCTL4 register (that sets MCLK=XT2). My initialization code:
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WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
P5SEL |= BIT2+BIT3; // Port select XT2
UCSCTL6 &= ~XT2OFF; // Enable XT2
UCSCTL6 |= XT2DRIVE_3; // XT2 osc current to MAX
UCSCTL3 |= SELREF_2; // FLLref = REFO
// Since LFXT1 is not used,
// sourcing FLL with LFXT1 can cause
UCSCTL4 = SELA_2+SELS_3+SELM_3; // ACLK=REFO,SMCLK=DCO,MCLK=DCO
UCSCTL6 |= XT1OFF; // XT1OFFG flag to set
// Loop until XT1,XT2 & DCO stabilizes - in this case loop until XT2 settles
do
{
UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + DCOFFG);
// Clear XT2,XT1,DCO fault flags
SFRIFG1 &= ~OFIFG; // Clear fault flags
} while (SFRIFG1&OFIFG); // Test oscillator fault flag
UCSCTL4 = SELA_2+SELS_5+SELM_5; // ACLK=REFO,SMCLK=MCLK=XT2=24Mhz
UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + DCOFFG);
SFRIFG1 &= ~OFIFG;
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If I change SELM_5 for SELM_3, for example, the software runs fine (note that SMCLK=XT2=24Mhz), although some peripherals do not run properly due the incorrect MCLK frequency.
At first I thought could be a XTAL or load capacitor problems, however 3 boards already showed exact the same behavior. Another strange thing is, since this design allows firmware upgrade using USB (using TI bootstrap routines), the board runs fine after soft reboot from the update process, however it will not run again if you power cycle it. If you debug it, it goes all well until the UCSCTL4 where, after few instructions, it just crashes and jumps to a random address.
Any idea what could cause such UCS behavior?
Gabriel
