CCS/MSP430FR2422: How to control CS pin in SPI communication

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//******************************************************************************
//  MSP430FR2422 Demo - eUSCI_A0, SPI 4-Wire Master Incremented Data
//
//  Description: SPI master talks to SPI slave using 4-wire mode. Incrementing
//  data is sent by the master starting at 0x01. Received data is expected to
//  be same as the previous transmission RXData = TXData-1.
//  The slave select signal is set to active high.
//  USCI RX ISR is used to handle communication with the CPU, normally in LPM0.
//  ACLK = ~32.768kHz, MCLK = SMCLK = DCO ~1MHz.  BRCLK = ACLK/2.
//
//
//                  MSP430FR2422
//                -----------------
//            /|\|                 |
//             | |                 |
//             --|RST              |
//               |                 |
//               |             P1.4|-> Data Out (UCA0SIMO)
//               |             P1.5|<- Data In (UCA0SOMI)
//               |             P1.6|-> Serial Clock Out (UCA0CLK)
//               |             P1.7|-> Slave Select (UCA0STE)
//
//
//   Rui Ji
//   Texas Instruments Inc.
//   May 2017
//   Built with IAR Embedded Workbench v6.20 & Code Composer Studio v6.1
//******************************************************************************
#include <msp430.h>


unsigned int job_count0 = 0;
unsigned int job_count1 = 0;
unsigned int job_count2 = 0;
unsigned int job_count3 = 0;


unsigned char RXData =0;
unsigned char TXData;
unsigned char TX_baf_ini[12] = {0x90,0x01,0x01,0x11,0x21,0x31,0x41,0x51,0x61,0x71,0x81,0x91};

unsigned char spi_TX_buf[10] = {0};
unsigned char spi_TX_ByteCtr = 0;
unsigned char spi_TX_Index = 0;

union LED{       //�@�����ŕϐ��̌^��w��
    unsigned int all;     //�@long�^
    struct{
            char upper;   //�@���b�Z�[�W�����8bit
            char lower;   //�@���b�Z�[�W������8bit
        }byte;
    struct{
        unsigned int b15 : 1;   //
        unsigned int b14 : 1;   //
        unsigned int b13 : 1;   //
        unsigned int b12 : 1;   //
        unsigned int b11 : 1;   //
        unsigned int b10 : 1;   //
        unsigned int b9  : 1;   //
        unsigned int b8  : 1;   //
        unsigned int b7  : 1;   //
        unsigned int b6  : 1;   //
        unsigned int b5  : 1;   //
        unsigned int b4  : 1;   //
        unsigned int b3  : 1;   //
        unsigned int b2  : 1;   //
        unsigned int b1  : 1;   //
        unsigned int b0  : 1;   //
    }bit;           //�@bit�P�ʂŃA�N�Z�X����Ƃ��̖��O
};
union LED led;

void spi_put_set( unsigned char *put_dest, char buf_count ){

    char buf_index = 0;

    spi_TX_ByteCtr = buf_count;

    for (buf_index = 0; buf_index < buf_count; buf_index++)
    {
        spi_TX_buf[buf_index] = put_dest[buf_index];
    }
}

int main(void)
{
    WDTCTL = WDTPW | WDTHOLD;                 // Stop watchdog timer

    P2DIR |= BIT0;               // Set P1.2,P1.4,P1.5 to�@OUT
    P2OUT |= BIT0;

    // Timer�ݒ�
    TA0CTL = TASSEL_2 + MC_0;                   // count stop
    TA0CTL = TACLR;                             // timer reset
    TA0CCR0 = 1000;                              // Count limit (����N���b�N/TA1CCR0 [msec])
    TA0CCTL0 = CCIE;                            // Enable Timer A0 interrupts
    TA0CTL = TASSEL_2 + MC_1;                   // count UP (TA1CCR0�̒l�܂ŃJ�E���g�A�b�v)
//    TA0CCTL0 |= CCIE;                             // TACCR0 interrupt enabled
//    TA0CCR0 = 10;
//    TA0CTL |= TASSEL__SMCLK | MC__CONTINUOUS;     // SMCLK, continuous mode
    _BIS_SR(GIE);                               // ���荞�݋���

    P1SEL0 |= BIT4 | BIT5 | BIT6 | BIT7;      // set 4-SPI pin as second function

    UCA0CTLW0 |= UCSWRST;                     // **Put state machine in reset**
                                              // 4-pin, 8-bit SPI master
    UCA0CTLW0 |= UCMST|UCSYNC|UCCKPL|UCMSB|UCMODE_1|UCSTEM;
                                              // Clock polarity high, MSB
    UCA0CTLW0 |= UCSSEL__SMCLK;               // SMCLK
    UCA0BR0 = 0x01;                           // /1, fBitClock = fBRCLK/UCBRx
    UCA0BR1 = 0;                              //
    UCA0MCTLW = 0;                            // No modulation
    UCA0CTLW0 &= ~UCSWRST;                    // **Initialize USCI state machine**
    UCA0IE |= UCRXIE;                         // Enable USCI_A0 RX interrupt
    TXData = 0x01;                            // Holds TX data

    PM5CTL0 &= ~LOCKLPM5;                     // Disable the GPIO power-on default high-impedance mode
                                              // to activate previously configured port settings
//    __bis_SR_register(LPM0_bits | GIE);           // Enter LPM3 w/ interrupts

    spi_put_set(TX_baf_ini,10);

    while(1)
    {
        // 1msec
        if(job_count0 >= 1){
            job_count0 = 0;
            UCA0IE |= UCTXIE;                      // Enable TX interrupt
            __bis_SR_register(LPM0_bits | GIE);       // Enter LPM0,enable interrupts
            TXData++;                                 // Increment transmit data
        }
        // 10msec
        if(job_count1 >= 100){
            job_count1 = 0;

        }
        // 500msec
        if(job_count2 >= 500){
            job_count2 = 0;
            P2OUT ^= BIT0;
            //            __bis_SR_register(LPM0_bits | GIE);    // Enter LPM0,enable interrupts
            //            __no_operation();                      // For debug,Remain in LPM0
            //            if( spi_TX_ByteCtr >= 1 && (UCTXIFG == (UCA0IFG & UCTXIFG)) ){
                        if( spi_TX_ByteCtr >= 1 ){
                        }
                        else {
                            spi_TX_Index = 0;
                            UCA0IE &= ~UCTXIE;
                        }
        }
        // 1.0sec
        if(job_count3 >= 1000){
            job_count3 = 0;
            spi_put_set(TX_baf_ini,10);
        }


  }
}

#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=USCI_A0_VECTOR
__interrupt void USCI_A0_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(USCI_A0_VECTOR))) USCI_A0_ISR (void)
#else
#error Compiler not supported!
#endif
{
  switch(__even_in_range(UCA0IV,USCI_SPI_UCTXIFG))
  {
    case USCI_NONE: break;                    // Vector 0 - no interrupt
    case USCI_SPI_UCRXIFG:
           RXData = UCA0RXBUF;
           UCA0IFG &= ~UCRXIFG;
           __bic_SR_register_on_exit(LPM0_bits);// Wake up to setup next TX
           break;
    case USCI_SPI_UCTXIFG:
          UCA0TXBUF = TXData;                // Transmit characters
//            UCA0TXBUF = spi_TX_buf[spi_TX_Index];
//            spi_TX_buf[spi_TX_Index] = 0x00;
//            spi_TX_Index++;
//            spi_TX_ByteCtr--;
          UCA0IE &= ~UCTXIE;
          break;
    default: break;
  }
}
// Timer A0 interrupt service routine
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = TIMER0_A0_VECTOR
__interrupt void Timer_A (void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(TIMER0_A0_VECTOR))) Timer_A (void)
#else
#error Compiler not supported!
#endif
{

    job_count0++;
    job_count1++;
    job_count2++;
    job_count3++;


    TA0CTL = TASSEL_2 + MC_0;                   // count stop
    TA0CTL = TACLR;                             // timer reset
    TA0CCR0 = 1000;                              // Count limit (����N���b�N/TA1CCR0 [msec])
    TA0CCTL0 = CCIE;                            // Enable Timer A0 interrupts
    TA0CTL = TASSEL_2 + MC_1;                   // count UP (TA1CCR0�̒l�܂ŃJ�E���g�A�b�v)
//    TA0CCR0  = 10;                         // Count limit
//    TA0CTL   = TASSEL__SMCLK | MC__CONTINOUS;
    _BIS_SR(GIE);                               // ���荞�݋���
}