MSP430FR2311: I2C Clock Speed too slow?

Moritz Obermann

Hi there,

I'm using the MSP430FR2311 with the driverlib to communicate to a MPU9250 Sensor via I2C.
I configured the I2C using the examples from the driverlib:

#define CS_SMCLK_DESIRED_FREQUENCY_IN_KHZ   1000

//Set Ratio and Desired MCLK Frequency  and initialize DCO
CS_initFLLSettle(CS_SMCLK_DESIRED_FREQUENCY_IN_KHZ, CS_SMCLK_FLLREF_RATIO);
//Set SMCLK = DCO with frequency divider of 1
CS_initClockSignal(CS_SMCLK, CS_DCOCLKDIV_SELECT, CS_CLOCK_DIVIDER_1);
//Set MCLK = DCO with frequency divider of 1
CS_initClockSignal(CS_MCLK, CS_DCOCLKDIV_SELECT, CS_CLOCK_DIVIDER_1);
// Configure I2C pins 1.2 and 1.3
GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P1, GPIO_PIN2 + GPIO_PIN3, GPIO_PRIMARY_MODULE_FUNCTION);
// Disable the GPIO power-on default high-impedance mode to activate previously configured port settings
PMM_unlockLPM5();

//Initialize Master
EUSCI_B_I2C_disable(EUSCI_B0_BASE);
EUSCI_B_I2C_initMasterParam param = {0};
param.selectClockSource = EUSCI_B_I2C_CLOCKSOURCE_SMCLK;
param.i2cClk = CS_getSMCLK();
param.dataRate = EUSCI_B_I2C_SET_DATA_RATE_400KBPS;
//param.dataRate = EUSCI_B_I2C_SET_DATA_RATE_100KBPS;
param.byteCounterThreshold = 1;
param.autoSTOPGeneration = EUSCI_B_I2C_NO_AUTO_STOP;
EUSCI_B_I2C_initMaster(EUSCI_B0_BASE, &param);
//Specify slave address
EUSCI_B_I2C_setSlaveAddress(EUSCI_B0_BASE, MPU_I2C_ADDR);
//Enable I2C Module to start operations
EUSCI_B_I2C_enable(EUSCI_B0_BASE);

However, my logic analyzer shows the I2C Clock to only be ~196kHz when sending data to the sensor. The communication seems to work fine. I expected the clock to be around 400kHz, because of the 'EUSCI_B_I2C_SET_DATA_RATE_400KBPS'. Did I understand something wrong or am I doing something wrong?

Thanks and best regards,

moe

over 5 years ago

0 David Schultz over 5 years ago

Guru 26155 points

I have no idea what driverlib is doing under the covers but if you use a 1MHz SMCLK you can't get 400KHz. 500Khz and 250KHz yes, but 400KHz, no.

If you really want 400KHz, then SMCLK must be an integer multiple of that.

0 Moritz Obermann over 5 years ago in reply to David Schultz

Prodigy 40 points

Thank you! I actually was thinking about that too and tried changing CS_SMCLK_DESIRED_FREQUENCY_IN_KHZ to 1200, 1600, 2000, 4000 and 10000. But on all these desired frequencies I then couldnt get any I2C communication to work at all. Do I need to anything else for another frequency to work? When I changed it to 800kHz I still had working I2C, but he clock was still on about 200kHz.

0 David Schultz over 5 years ago in reply to Moritz Obermann

Guru 26155 points

Verify that the parameter block is being filled with the correct data.

0 Srinivas Lingam over 5 years ago in reply to David Schultz

TI__Expert 7395 points

Hi Moritz & David,

The I2C section of the User's guide (https://www.ti.com/lit/pdf/slau445) has this information: "The maximum bit clock that can be used in single master mode is fBRCLK/4." Please see section 24.3.7 I 2C Clock Generation and Synchronization.

That might explain why you are getting a lower clock rate when you use SMCLK = 1 MHz.

Srinivas

0 Bruce McKenney over 5 years ago

Guru 102835 points

What is the value of CS_SMCLK_FLLREF_RATIO?

0 Moritz Obermann over 5 years ago in reply to Srinivas Lingam

Prodigy 40 points

Yes, thanks! But then, why cant I use a SMCLK of, for example, 1200kHz?

0 Moritz Obermann over 5 years ago in reply to Bruce McKenney

Prodigy 40 points

Its 30, as per the driverlib examples. To be honest I dont understand the meaning of this value. Should I set it to something else?

0 Bruce McKenney over 5 years ago in reply to Moritz Obermann

Guru 102835 points

30 is the multiple of the FLLREF clock (nom. REFO=32kHz) for the target speed (1MHz/32768 = ~30). This is the actual target frequency. The KHZ setting adjusts DCORSEL, which is a general range. [ Ref data sheet (SLASE58E) Table 5-6].

I think Srinivas called it, though my experiments indicate the minimum divisor is more like 5 than 4. Changing BRW from 5 to 4 actually slowed the bus down (effective divisor 6). The I2C unit has to meet the restrictions in the I2C Spec (UM10204 Rev 6 Table 10), and there may be some internal rounding error somewhere in the I2C unit.

I was able to get 400kHz with a 2MHz SMCLK (RATIO=62, KHZ=2000 -> BRW=5).

[Edit: "Scope trace or it didn't happen". Or some such.

]

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MSP430FR2311: I2C Clock Speed too slow?