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MSP430FR5964: Entering to LPMX.5

Part Number: MSP430FR5964


Hi,

I am wondering the usage of the GIE when entering to LPMX.5.  On the user guide  paragraph 1.4.3.1  Entering to LPMx.5  on point 8.  It is stated that GIE shall be cleared.

I want to wake up from LPMx.5 with port pin interrupt which is configured accordingly.  Will the port pin interrupt work in this case without setting the GIE?

On other paragraph 12.3.3.  point b)  and NOTE  I understand that GIE should be set before entering to LPMX.5.  So what is right?  This is somehow confusing.

BR,

Heimo Lähdemäki

  • I think the recommendation for GIE=0 in Sec 1.4.3.1 is to avoid being interrupted while the PMM is half-configured. It doesn't consider the case in Sec 12.3.3 (NOTE), which is a window (yeah, a pretty small one) where the pin wakeup could be triggered but not dealt with before going into LPMx.5.

    I think the real answer is that GIE is inoperative in LPMx.5, so it doesn't matter how it's set. The pin wakeup is predicated entirely on the GPIO configuration, which is saved away outside the peripheral registers and continues to operate in LPMx.5. Example msp430fr599x_lpm4-5_01.c shows a pin wakeup while in LPMx.5 with GIE=0. (I guess the author wasn't worried about the race.)

    https://dev.ti.com/tirex/explore/node?node=AIYrDpSzWLAdyMoaXu1iPQ__IOGqZri__LATEST

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