MSP430FR5994: I/O pin state during reset

Ted Hordeski

Part Number: MSP430FR5994

Section 1.2.1 of the device family user's guide (slau367p) defines initial conditions after a system reset. Is the state of I/O pins defined while reset is asserted?

over 5 years ago

0 Eddie LaCost over 5 years ago

TI__Mastermind 45225 points

Hello Ted,

With a BOR, the initial conditions are set when the RST pin transitions to low, so while reset is asserted, I/O pins will be in the initial device conditions shown in section 1.2.1.

0 Ted Hordeski over 5 years ago in reply to Eddie LaCost

Prodigy 130 points

Are pull-up or pull-down resistors enabled?

0 Eddie LaCost over 5 years ago in reply to Ted Hordeski

TI__Mastermind 45225 points

Pull up and pull downs are disabled. Reset register state is shown in 12.4.5.

0 Ted Hordeski over 5 years ago in reply to Eddie LaCost

Prodigy 130 points

12.4.5 looks like an interrupt flag register, but Table 12-14 in section 12.4.12 does define the pullup/dn regiser.

0 Eddie LaCost over 5 years ago in reply to Ted Hordeski

TI__Mastermind 45225 points

Ted,

Just want to clarify, 12.4.5 is the Digital I/O register description. Table 12-14 is the interrupt flag register. I don't see a section 12.4.12 in slau367p.

0 Ted Hordeski over 5 years ago in reply to Eddie LaCost

Prodigy 130 points

You are correct. I had the wrong document open (slau208q for the MSP430x5xx family). Should have been Table 12-8 in section 12.4.5 in slau367p.

0 Eddie LaCost over 5 years ago in reply to Ted Hordeski

TI__Mastermind 45225 points

Thanks for confirming! I will close this thread.

**Attention** This is a public forum

MSP low-power microcontrollers

MSP low-power microcontroller forum

MSP430FR5994: I/O pin state during reset