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MSP430FR2355: Interfacing problem between MCU and gate driver circuit.

Part Number: MSP430FR2355
Other Parts Discussed in Thread: MSP430FR4133, TIDA-010056, DRV8353, DRV8353R

Hello TI helpers,

I'm using CCS version 10.1.1.00004 . I have MSP430FR4133 launchpad used as burner  into my controller which has MSP430FR2355 MCU and gate driver circuit (DRV8353RH). I am working on BLDC motor controller. I have TIDA-010056_Firmware_1.0 code which i am using for my project and i give 24v using adapter to controller. I am able to burn code into my controller but i didn't get any voltage across MOSFETs(inverter circuit).i do not connect BLDC motor yet. I want 20v across MOSFETs but didn't get it. Is there any interfacing problem??? please help me?! Thank you in advance.

  • Hello Sudhir, 

    I have experience in both the MSP430 and DRV devices. Let's break down the problem in terms of what you can measure:

    1) Can you make sure ENABLE is set high to 3.3V?

    2) Can you make sure VM > 8.3V?

    3) Can make sure you are seeing proper PWM signals coming from INHA, INLA, INHB, INLB,  INHC, and/or INLC?

    If these three conditions are met from the MCU side, then the gate driver should be enabled and you should be able to see the gate driver outputs occur so that a signal from INHx results in a gate drive differential signal on GHx-SHx, and that a signal from INLx results in a differential gate drive signal from GLx-SLx. If this is not the case, then we can narrow the issue to the DRV8353. 


  • Thank you for your quick response,

    how to make sure that VM is greater than 8.3V...& check it from software side or hardware side???

  • Hi Subhir,

    From the hardware side. What is your supply voltage? As long as the VM pins of the DRV8353 are greater than the undervoltage lockout specification (8.3V), then the gate driver logic will be enabled in the DRV8353. 

  • I am using 24V adapter for supply voltage.

    As you can see in above pic P4.1 is used for enabling DRV circuit and P4OUT(in register) has logic high on p4.1. It shows that DRV is enable. Now what is the problem..i don't get it.. please help me.

    Thank you!

  • Hi Sudhir,

    And you are sending PWM waveforms from the INHx/INLx signals to the MCU? May be helpful to get an oscilloscope screenshot of INHA, GHA, ENABLE, and the  nFAULT pin in the same capture to ensure that the MCU is doing its job to enable the gate drivers and that there are no faults (nFAULT = high) on the DRV8353RH.

    One resource that may help you clarify there are no issues on the software side is to reference the software files available for TIDA-010056. This reference design uses the MSP430FR2355 so can use it to make sure everything is initialized and used correctly (GPIOs, Timers for PWM generation, CSA outputs to the A/D of the MCU), and then compare it to your application. 

    Let me know if you have any concerns about signals coming from the MCU side...if nothing seems wrong, then we can focus our efforts to the hardware of the DR8353RH. 

  • Hi Aaron Barrera,

    Thank you for your response.

    We have given 24V to VM pin of DRV8353RH however we are not getting voltage across MOSFET. I am attaching photos of P4 port in which driver SPI pins are connected. It might be helpful to you for solving this problem. 

    I think there is no problem on PWM generation from MCU side because we have use code given by TI.

    DRV SPI PIN Configuration     P4.4-->SCS     P4.5-->SCLK   P4.6 -->MOSI    P4.7-->MISO

    One of TI helper said that we are using DRV8353RH does not contain SPI communication. 

  • Hi Aaron Behra,

    Now we are getting voltage across MOSFET after giving 24 volts on VM pin.

    But we are getting voltage only MOSFET connected on phase B and phase C, we are not getting voltage across MOSFET of phase A. 

  • Hi Sudhir,

    Using the DRV8353RH is the hardware version of the DRV8353R, meaning that there are no SPI pins and they are replaced with GAIN, VDS, IDRIVE, and MODE. 

    IDRIVE and VDS are 7-level input pins, and VDS and MODE are 4-level input pins, set by an external voltage and resistor.

    For the MODE pin, make sure that it is tied to GND to use 6x PWM mode, allowing each input signal (INHx/INLx) to turn on the respective gate driver signal (GHx/GLx). You could also use Independent Mode (MODE = 3.3V) to test the voltage across the MOSFETs, but this will disable dead time and VDS protection on the FETs.

    For phase A, can you check to see if GHA to SHA is about 10-12V on an oscilloscope when INHA = 3.3V and INLA = GND? Compare this behavior to phase B and phase C respectively to see the proper gate drive signal behavior (GHx-SHx) since you are seeing outputs on Phase B and Phase C. 

    Also can you ensure the nFAULT pin stays high to indicate there are no faults? 

  • here is the picture of our 6 MOSFETs...

    which side of MOSFETs is HIGH side??

    Upper 3 MOSFETs are HIGH side????

    and one more thing to add...we are getting 3.3v on pin c23(gate voltage for phase A) but not on c21 and c22. so we can't decide whether c23 is GHA or GLA pin

  • Hi Sudhir,

    I cannot assume which MOSFETs are the high side MOSFETs from the picture alone. For each half-bridge (HIGH side + LOW side MOSFET), the HIGH side is the MOSFET that connects between VM and the phase output (SHA, SHB, or SHC). 

    Do you have a schematic you can share? This will make analyzing the solution much easier rather than guessing where the issues may lie.

  • Hi Sudhir,

    I have been informed this thread is also on the BLDC E2E page. If you have any more outstanding questions, please resolve on that thread. I will close this one for now since this is no longer an MSP430 issue. 

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