Part Number: MSP430FR2422
Hello TI support,
I use the CCS 10.2.0 for programming my MSP430FR2422.
At the moment a run your demo code "msp430fr2422_lpm3_5_01.c" for reaching the LPM3.5 low power mode successfully.
With one modification, because I do not have a external crystal XT1 connected.
Thus the clock source of the RTC is VLO.
While in LPM3.5, I measured a current draw of 0.3 uA at 2,5V.
That is a great result.
But the dataheet says additionally:
"The high-side supervisor (SVSH) oversees DV CC . It is active in all power modes by default. In LPM3,
LPM4, LPM3.5, and LPM4.5, it can be disabled by setting SVSHE = 0."
I am now thinking about whether the current draw can still be reduced in LPM3.5 by disabling the SVS?
My quick try to place the following code in my main() routine is not working (or leads to a reset):
// disabling the SVS (Supply Voltage Supervisor) by setting SVSHE = 0
// Open PMM registers for write access
PMMCTL0_H = PMMPW_H;
PMMCTL0 &= ~SVSHE;
// Lock PMM registers for write access
PMMCTL0_H = 0x00;
Please can you confirm: It is possible to disable the SVS to reduce the current in LPM3.5? If yes, how can I do this? What is the right piece / place of code?
Thank you so much!
Best regards
Stefan