MSP430FR5994: I2C simple code for writing on EEPROM

Dear Sir,

I am trying to  make a simple I2C master code to the write the values to the EEPROM  AT24C02D-SSHM-T. Here I am using MSP430FR5994IPNR.

I have a simple I2C code and it didn't work. Slave address here i  am using is 0XA0.And i shorted the lines A0, A1 and A2 of the EEPROM to the ground. please provide a working code for this EEPROM.

Regards,

Neethu

Example code:

//******************************************************************************
#include <msp430.h>

const unsigned char TXData[] = { 0xAA };
const unsigned char SlaveAddress[] = { 0xA0 };
volatile unsigned char TXByteCtr;
volatile unsigned char SlaveFlag = 0;

int main(void)
{

WDTCTL = WDTPW | WDTHOLD;

// Configure GPIO
P7SEL0 |= BIT0 | BIT1;
P7SEL1 &= ~(BIT0 | BIT1);

// Disable the GPIO power-on default high-impedance mode to activate
// previously configured port settings
PM5CTL0 &= ~LOCKLPM5;

// Configure USCI_B2 for I2C mode
UCB2CTLW0 = UCSWRST; // put eUSCI_B in reset state
UCB2CTLW0 |= UCMODE_3 | UCMST | UCSSEL__SMCLK; // I2C master mode, SMCLK
UCB2BRW = 0x8; // baudrate = SMCLK / 8
UCB2CTLW0 &= ~UCSWRST; // clear reset register
UCB2IE |= UCTXIE0 | UCNACKIE; // transmit and NACK interrupt enable

SlaveFlag = 0; // Initialize SlaveFlag

while(1)
{
__delay_cycles(1000); // Delay between transmissions
// UCB2I2CSA = SlaveAddress[SlaveFlag];// configure slave address
UCB2I2CSA = 0xA0;// configure slave address
TXByteCtr = 1; // Load TX byte counter
while (UCB2CTLW0 & UCTXSTP); // Ensure stop condition got sent

UCB2CTLW0 |= UCTR | UCTXSTT; // I2C TX, start condition

__bis_SR_register(LPM0_bits | GIE); // Enter LPM0 w/ interrupts
// Remain in LPM0 until all data
// is TX'd
// Change Slave address

}
}

#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = EUSCI_B2_VECTOR
__interrupt void USCI_B2_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(EUSCI_B2_VECTOR))) USCI_B2_ISR (void)
#else
#error Compiler not supported!
#endif
{
switch(__even_in_range(UCB2IV, USCI_I2C_UCBIT9IFG))
{
case USCI_NONE: break; // Vector 0: No interrupts
case USCI_I2C_UCALIFG: break; // Vector 2: ALIFG
case USCI_I2C_UCNACKIFG: // Vector 4: NACKIFG
UCB2CTLW0 |= UCTXSTT; // resend start if NACK
break;
case USCI_I2C_UCSTTIFG: break; // Vector 6: STTIFG
case USCI_I2C_UCSTPIFG: break; // Vector 8: STPIFG
case USCI_I2C_UCRXIFG3: break; // Vector 10: RXIFG3
case USCI_I2C_UCTXIFG3: break; // Vector 12: TXIFG3
case USCI_I2C_UCRXIFG2: break; // Vector 14: RXIFG2
case USCI_I2C_UCTXIFG2: break; // Vector 16: TXIFG2
case USCI_I2C_UCRXIFG1: break; // Vector 18: RXIFG1
case USCI_I2C_UCTXIFG1: break; // Vector 20: TXIFG1
case USCI_I2C_UCRXIFG0: break; // Vector 22: RXIFG0
case USCI_I2C_UCTXIFG0: // Vector 24: TXIFG0
if (TXByteCtr) // Check TX byte counter
{
// UCB2TXBUF = TXData[SlaveFlag]; // Load TX buffer
UCB2TXBUF = 0xAA; // Load TX buffer
TXByteCtr--; // Decrement TX byte counter
}
else
{
UCB2CTLW0 |= UCTXSTP; // I2C stop condition
UCB2IFG &= ~UCTXIFG; // Clear USCI_B2 TX int flag
__bic_SR_register_on_exit(LPM0_bits); // Exit LPM0
}
break;
case USCI_I2C_UCBCNTIFG: break; // Vector 26: BCNTIFG
case USCI_I2C_UCCLTOIFG: break; // Vector 28: clock low timeout
case USCI_I2C_UCBIT9IFG: break; // Vector 30: 9th bit
default: break;
}
}