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MSP430F6659: Adding Dither frequency to generated PWM frequency

Part Number: MSP430F6659

Hello TI,

I am working on a project to control linear control valves using proportional solenoid valves. We are using TimerA in PWM mode(PWM output mode: 7 - PWM reset/set) for controlling proportional solenoid valves with respect to a set value. Here the generated PWM output would cause the current of the solenoid coil to increase or decrease as the duty cycle of the PWM increases or decreases. The minimum limit of duty cycle is between 35% to 40% and any duty cycle belw this value causes the solenoid valve to close. Presently while testing the control using solenoid valve it is observed that the solenoid valve stops opening at variable duty cycle between 35 to 40%. Now as per the datasheet of the proportional solenoid valve the generated PWM should also contain dither frequency superimposed on the PWM frequency to achieve better linearity and hysterisis. Therefore I believe that dither frequency is required so that solenoid valve stops opening at a fixed duty cycle around 40% as given in the solenoid valve datasheet. Due to this I can stop the valve accurately without any fluctuation in control as per the Set value

For achieveing PWM and adding dither frequency I would be doing following in the software 

Initialise TImerA as below:

TA0CCR0 = as per Time period of PWM = 32000;

TA0CCTL1 = OUTMOD_7 + CCIE; //PWM output mode: 7 - PWM reset/set and interrupt enable for CCIFG

TA0CTL = TASSEL_2 + MC_1 + TACLR + ID__4; //Total Time period = SMCLK/4 = 16MHz/4 = 4MHz. TImer period of PWM = TA0CCR0 / Total time period = 32000/4M = 8ms. Frequency of PWM = 125Hz

Now inside control routine inside interrupt handler(interrupt handler for TImerA after every timer overflow event of PWM)

int16 x = TA0CCTL1;// store old TA0CCTL1  value

TA0CCTL1 = OUTMOD_5 + CCIE;// keep the output reset to avoid any disturbance to PWM otuput

TA0CCR1 = Duty;//Duty Cycle as per calculation and as per ofset added for dither;

TA0CCTL1 = x;//Restore old TA0CCTL1  value

So as shown above to add dither frequency I will update duty cycle inside the timer handler after i get interrupt caused due to timer overflow in PWM output

This is done so that dither frequency is achieved as a multiple factor of PWM frequency

I have following qustions:

1) I wanted to know whether I would be able to achieve dither frequency superimposed as multiple factor of PWM frequency using above method. PWM is already achieved without any interrupt being enabled.Here I need to enable interrupt

2) Whether there is another method for adding dither frequency as above method would use up CPU time while processing interrupt ahndler espescially for higher frequency PWM

3) I also wanted to generate high frequency PWM upto 10 KHz. I am not able to achieve it as output driver circuit used is high frequency solid state relay(SSR) I am able to achieve max frequency at the input of solenoid coil of only upto 500Hz due to delay in the SSR circuit. Is there any output driver circuit available which can produce high frequency PWM for proportional solenoid valve

  • 1) I'm not quite sure what "multiple factor" means here, but the sequence you listed appears about right. 

    2) This seems like a good application for DMA. Supposing that the dither function is periodic, you could build a table of CCR1 (duty+dither) values for one period, and use trigger=1 (TA0CCR0) and DMADT=4 to write successive duty cycle values in a cyclic fashion [Ref data sheet (SLAS700D) Table 6-13]. When you want to switch duty cycles, you just have to set DMAEN=0, write a new DMAxSA value, then set DMAEN=1. There's a small race here, but the cost of losing is that you get one extra PWM period using the old value, which seems benign.

    3) I have to defer to others on this one.

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