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MSP430FR5858: Clock Register

Part Number: MSP430FR5858

I have a technical question about clock register settings of MSP430FR5858.

Recently, we recognize we set wrong value for HFFREQ in CSCTL4 register of MSP430FR5858.

We are using 16MHz as HFXT. But the HFFREQ settings was 0 to 4MHz.

And MCLK and SMCLK is using HFXT as clock source and it is divided by 4(at CSCTL3).

We will fix this part to fit our HFXT.

But I would like to know how it behaves with wrong settings.

Because our prototype devices are using the wrong setting.

  • Hi Sebastian,

    These bits select the drive strength for the frequency of the crystal you are using as well as controlling the power management unit.

    Chances are the crystal you are using starts up with the lower 4MHz drive strength just fine, so no harm done.  Make the change and you should be good to go.