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MSP430F5529: SPI busy never clears

raceratb
Prodigy 10 points

Part Number: MSP430F5529

I am operating the MSP as a slave device, and i use DMA to accomplish the data transfers. I have a ISR thats called when the SS is disabled. like the examples the first thing i check is if the spi is busy.

 while( USCI_A_SPI_isBusy( USCI_A0_BASE ) == UCBUSY && wait_count++ < MAX_WAITS )
    {
        ;
    }
I added the max waits, because its never not busy. Everything seem to transfer just fine. Is this something i should be concerned about, or can i just take out this check, since the very next thing i do is disable the dma, and spi to reset them.
  • 0
    Guru 102845 points

    I've never tried this but my guess is that the DMA has pre-loaded TXBUF (->shift register) with a byte which won't be sent until the next transaction, so it's just sitting there. This would occur if the DMA length is greater than the number of bytes the master actually asked for.

    Generally, this pre-loading is a good thing, since that first byte is immediately available when the master starts the transaction. But it does mean everyone has to count the bytes just right.

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