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MSP430FR5994: concurrent memory access

Part Number: MSP430FR5994


How does the MSP430FRF5994 prevent concurrent access of the same memory for either FRAM or RAM? For example, a thread based poll of an address is doing a 32 bit read, and a timer ISR wakes and attempts a write to the same location. How is this handled in the MSP430FR5994?

  • It's quite possible for an interrupt to break into a non-atomic (e.g. 2x16-bit) memory reference. It's up to the programmer to avoid a conflict by (a) disabling interrupts or (b) reading multiple times (mostly useful for a counter).

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