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MSP430F5659: The problem of RTC_B Calendar feature

Nobuyoshi Arai44
Expert 2575 points
Part Number: MSP430F5659


Hello TI Expert,

 

I have got a question from our customer and they are seeing some problems about the Calendar function of RTC_B of MSP430FR5659.

 

[Problem]

They sometimes see the problem that the RTC Calendar value becomes strange.

Please see the attached log file that they are issuing "time" command every seconds.

This is their firmware command that can get Year, Month, Day, Hour, Minutes and Seconds.

Normally, it should increase 1 second but it is increasing 87 or 97 years every 1 second.

After reaching at 4095 years, it goes back to 0 year and increasing 87 or 97 years again.

 

[Question]

This calendar function is normally working correct but they sometimes see this problem.

They do not think there is any mistake in the configuration of UCS or RTC register.

They are also reading some RTCCTL registers when the problem occurs. But we do not think there are any problem in these register values.

Thus, we do not know what the problem is. Do you have any comment to this problem and give any advice?

 

It would be helpful if you can tell us any advice or tell us what point they should check.

 

Best Regards,

Nobu Arai

Fullscreen time.log Download 
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2018/03/27 10:45:40 time
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2018/03/27 10:45:49 time
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2018/03/27 10:45:51 2656/04/22 10:54:40

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2018/03/27 10:45:52 2742/06/01 19:38:51

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2018/03/27 10:45:53 2839/02/24 05:27:43

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2018/03/27 10:46:06 4002/02/12 03:27:17

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2018/03/27 10:46:28 regr 0160
2018/03/27 10:46:28 0160: 10


2018/03/27 10:46:29 regr 0161
2018/03/27 10:46:29 0161: 14


2018/03/27 10:46:29 regr 0162
2018/03/27 10:46:29 0162: 20


2018/03/27 10:46:30 regr 0163
2018/03/27 10:46:30 0163: 00


2018/03/27 10:46:30 regr 0164
2018/03/27 10:46:30 0164: 1f


2018/03/27 10:46:30 regr 0165
2018/03/27 10:46:30 0165: 10


2018/03/27 10:46:31 regr 0166
2018/03/27 10:46:31 0166: 20


2018/03/27 10:46:31 regr 0167
2018/03/27 10:46:31 0167: 00


2018/03/27 10:46:32 regr 0168
2018/03/27 10:46:32 0168: 55


2018/03/27 10:46:32 regr 0169
2018/03/27 10:46:32 0169: 00


2018/03/27 10:46:33 regr 016a
2018/03/27 10:46:33 016a: 00


2018/03/27 10:46:33 regr 016b
2018/03/27 10:46:33 016b: 00


2018/03/27 10:46:33 regr 016c
2018/03/27 10:46:33 016c: 40


2018/03/27 10:46:34 regr 016d
2018/03/27 10:46:34 016d: 40


2018/03/27 10:46:34 regr 016e
2018/03/27 10:46:34 016e: 02


2018/03/27 10:46:35 regr 016f
2018/03/27 10:46:35 016f: 04


2018/03/27 10:46:35 regr 0170
2018/03/27 10:46:35 0170: 07


2018/03/27 10:46:36 regr 0171
2018/03/27 10:46:36 0171: 07


2018/03/27 10:46:36 regr 0172
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2018/03/27 10:46:36 regr 0173
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2018/03/27 10:46:56 regr 04a0
2018/03/27 10:46:56 04a0: 49


2018/03/27 10:46:56 regr 04a1
2018/03/27 10:46:56 04a1: 30


2018/03/27 10:46:57 regr 04a2
2018/03/27 10:46:57 04a2: 00


2018/03/27 10:46:57 regr 04a3
2018/03/27 10:46:57 04a3: 00


2018/03/27 10:46:58 regr 04a8
2018/03/27 10:46:58 04a8: 01


2018/03/27 10:46:58 regr 04a9
2018/03/27 10:46:58 04a9: 00


2018/03/27 10:46:58 regr 04aa
2018/03/27 10:46:59 04aa: 01


2018/03/27 10:46:59 regr 04ab
2018/03/27 10:46:59 04ab: 00


2018/03/27 10:46:59 regr 04ac
2018/03/27 10:46:59 04ac: 21


2018/03/27 10:47:00 regr 04ad
2018/03/27 10:47:00 04ad: aa



2018/03/27 10:47:01 regr 04b0
2018/03/27 10:47:01 04b0: 25


2018/03/27 10:47:01 regr 04b1
2018/03/27 10:47:01 04b1: 1e


2018/03/27 10:47:01 regr 04b2
2018/03/27 10:47:01 04b2: 02


2018/03/27 10:47:02 regr 04b3
2018/03/27 10:47:02 04b3: 04


2018/03/27 10:47:02 regr 04b4
2018/03/27 10:47:02 04b4: 19


2018/03/27 10:47:03 regr 04b5
2018/03/27 10:47:03 04b5: 04


2018/03/27 10:47:03 regr 04b6
2018/03/27 10:47:03 04b6: 96


2018/03/27 10:47:03 regr 04b7
2018/03/27 10:47:04 04b7: 03


2018/03/27 10:47:04 regr 04b8
2018/03/27 10:47:04 04b8: 08


2018/03/27 10:47:04 regr 04b9
2018/03/27 10:47:04 04b9: 08


2018/03/27 10:47:05 regr 04ba
2018/03/27 10:47:05 04ba: 00


2018/03/27 10:47:05 regr 04bb
2018/03/27 10:47:05 04bb: 00


2018/03/27 10:47:06 regr 04bc
2018/03/27 10:47:06 04bc: 00


2018/03/27 10:47:06 regr 04be
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2018/03/27 10:47:59 regr 04b0
2018/03/27 10:47:59 04b0: 30


2018/03/27 10:47:59 regr 04b1
2018/03/27 10:47:59 04b1: 06


2018/03/27 10:48:00 regr 04b2
2018/03/27 10:48:00 04b2: 03


2018/03/27 10:48:00 regr 04b3
2018/03/27 10:48:00 04b3: 02


2018/03/27 10:48:00 regr 04b4
2018/03/27 10:48:00 04b4: 0a


2018/03/27 10:48:01 regr 04b5
2018/03/27 10:48:01 04b5: 04


2018/03/27 10:48:01 regr 04b6
2018/03/27 10:48:01 04b6: fa


2018/03/27 10:48:02 regr 04b7
2018/03/27 10:48:02 04b7: 08

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2018/03/27 10:48:06 regr 04b0
2018/03/27 10:48:06 04b0: 18


2018/03/27 10:48:07 regr 04b1
2018/03/27 10:48:07 04b1: 2c


2018/03/27 10:48:07 regr 04b2
2018/03/27 10:48:07 04b2: 17


2018/03/27 10:48:07 regr 04b3
2018/03/27 10:48:07 04b3: 04


2018/03/27 10:48:08 regr 04b4
2018/03/27 10:48:08 04b4: 1c


2018/03/27 10:48:08 regr 04b5
2018/03/27 10:48:08 04b5: 09


2018/03/27 10:48:09 regr 04b6
2018/03/27 10:48:09 04b6: 94


2018/03/27 10:48:09 regr 04b7
2018/03/27 10:48:09 04b7: 0a


2018/03/27 10:48:10 time
2018/03/27 10:48:10 2784/04/03 22:36:45

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2018/03/27 10:48:18 regr 04b0
2018/03/27 10:48:18 04b0: 00


2018/03/27 10:48:18 regr 04b1
2018/03/27 10:48:18 04b1: 38


2018/03/27 10:48:18 regr 04b2
2018/03/27 10:48:18 04b2: 06


2018/03/27 10:48:19 regr 04b3
2018/03/27 10:48:19 04b3: 01


2018/03/27 10:48:19 regr 04b4
2018/03/27 10:48:19 04b4: 01


2018/03/27 10:48:20 regr 04b5
2018/03/27 10:48:20 04b5: 0b


2018/03/27 10:48:20 regr 04b6
2018/03/27 10:48:20 04b6: 84


2018/03/27 10:48:20 regr 04b7
2018/03/27 10:48:20 04b7: 0e


2018/03/27 10:48:21 time
2018/03/27 10:48:21 3792/05/08 04:53:32

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*** Send Start ***

2018/03/27 10:48:23 regr 04b0
2018/03/27 10:48:23 04b0: 09


2018/03/27 10:48:24 regr 04b1
2018/03/27 10:48:24 04b1: 22


2018/03/27 10:48:24 regr 04b2
2018/03/27 10:48:24 04b2: 0a


2018/03/27 10:48:24 regr 04b3
2018/03/27 10:48:25 04b3: 04


2018/03/27 10:48:25 regr 04b4
2018/03/27 10:48:25 04b4: 11


2018/03/27 10:48:25 regr 04b5
2018/03/27 10:48:25 04b5: 0b


2018/03/27 10:48:26 regr 04b6
2018/03/27 10:48:26 04b6: 8a


2018/03/27 10:48:26 regr 04b7
2018/03/27 10:48:26 04b7: 00


2018/03/27 10:48:27 time
2018/03/27 10:48:27 0214/05/26 09:27:09

*** All Comaand Complete. ***

  • 0
    TI__Genius 15370 points

    Hi Nobu,

    It would be helpful to see the customers RTC setup so we can verify they have configured all the register settings correctly. Additionally, what are they sourcing the RTC from and are they using any low power modes during operation?

    Finally, I suggest looking into Using the MSP430 RTC_B Module with Battery Backup Supply application report for a comprehensive explanation of the peripheral and how to correctly use it.

    Best regards,

    Caleb Overbay

  • 0 in reply to Caleb Overbay
    Expert 2575 points

    Hello Caleb,

     

    Thank you for your comment.

    I answered it to the customer.

     

    They are saying that it may be caused from a hardware issue because this problem happens with only one unit that is working normally and the ratio of problem occurring is about 1%.

    This problem sometimes happens when they repeat the power on-off cycle.

     

    When they read RTC registers, they are polling RDY=1 and when they write them, they always write with RTCHOLD.

    But they are using LPM3. So, they will check the application report you specified and if they have any additional question, I will let you know.

     

    They also do not configure or write to RT0PS (04AC) and RT1PS (04AD) during this operation. So, this is not related with this problem. But if they read these registers, the value is always different.

    Is this normal? Or, should the value be fixed with /256 or /128?

     

    Anyway, if they provide any additional information, I will let you know.

     

    Best Regards,

    Nobu Arai

  • 0 in reply to Nobuyoshi Arai44
    TI__Genius 15370 points

    Hi Nobu, 

    Nobuyoshi Arai44 said:
    They are saying that it may be caused from a hardware issue because this problem happens with only one unit that is working normally and the ratio of problem occurring is about 1%.

    This is enough information to rule out an issue in their code. If they have setup some aspect of the device incorrectly via software it may be just outside the bounds of correct operation. Since we do not characterize how the device will fail, it could operate "correctly" on some occasions and incorrectly on others. 

    I'll refer back to my original response before answering the questions you've posed here. I'd really like to see a code excerpt of how they are setting up the RTC and accessing it. It would also be helpful to see their clock initialization and VCORE setup code. 

    Best regards, 

    Caleb Overbay

  • 0 in reply to Caleb Overbay
    Expert 2575 points

    Hello Caleb,

     

    Thank you for your comment.

    I am waiting for the feedback from customer about the settings of RTC but we have not got it yet.

    I will also ask them to provide the source code if it is possible for them.

     

    Once we get some information from them, I will let you know.

    Thank you very much for your supporting.

     

    Nobu Arai

  • 0 in reply to Nobuyoshi Arai44
    Expert 2575 points

    Hello Caleb,

     

    I am sorry for being late. But we got some additional information from them.

     

     

    First, it seems they are seeing this problem with not only 1 unit but also other 3 units.

    So, there may be some problems in their configuration or hardware connection.

     

    Next, we got their source code about the RTC and system init. We also got their schematics.

     

    So, we would like you to check their source code but it would be better to share these information by offline. Would you please tell us how to communicate with you separately from e2e forum?

     

    Please see the attached excel file that is measured result of 4 units.

     

    It looks 32kHz is not divided by RT0PS/RT1PS but directly written to the time and day at the same time.

    After the system is booting, the XT1 fault flag becomes 1.

    Is there any possibility that this kind of phenomenon happens due to the configuration of clock, RTC or hardware connection?

     

    It would be helpful I you have any advices.

     

    Best Regards.

    Nobu Arai

    RTC_Measurement_20180405.xlsx

  • 0 in reply to Nobuyoshi Arai44
    TI__Genius 15370 points
    This thread is being handled offline.

    Best regards,
    Caleb Overbay

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