I recently built a custom board based around the TM4C1231D5PM microcontroller. Deciding to skip the eval board, I went for broke and developed my own “eval” card with the other components I’m going to be using for my project. In addition to the uC above, I also picked up an XDS100 JTAG programmer from TI’s web store to debug the thing.
In the course of my tinkering I may or may not have accidentally programmed in some bad oscillator settings and locked myself out of the chip. I was hoping the XDS100 supported the unlock procedure, but it looks like the LM Flash programmer software doesn’t support that JTAG adaptor.
I do remember reading a section (4.3.4.3) in the datasheet listing an unlock procedure should one do exactly what I have done. The only problem is, I can’t seem to get the unlock procedure to work. Again, I don’t have the launchpad eval board, all I have is my custom board and the XDS100.
Using an Arduino, I’ve pumped in the unlock procedure. Reset is asserted low and held before and when the device is powered up, TMS is held high as 64 TCKs are clocked in, the JTAG-to-SWD command is clocked in on TMS and stable from the rising edge to falling edge of TCK (LSB first) followed by 64 more clocks with TMS high, then the SWD-to-JTAG command, repeated for a total of 10 mode switches, Reset is de-asserted, I wait a few seconds, and finally cycle the power. Still, I can’t connect to the device.
I will post the waveforms from the logic analyzer later today, but I’m at a bit of a loss here. I know the board is fine because I swapped out the chip with a spare and it worked until I again (with a long string of expletives) flashed it with the same defective main oscillator settings. (For reference, I’m using the internal oscillator with OSC0 tied to GND and OSC1 NC per the datasheet’s recommendations for internally clocked applications).
Any ideas would be great. I have an eval board on order (since I know that can reset the chips), but I would like to not have to wait for it to arrive.
UPDATE - Waveforms:
1. Overall Signal
2. Close up on beginning pattern. After looking at the XDS100 JTAG waveforms, I noticed that the "reset" of 50 or more TCKs is done at a slower speed than the rest of the actual data, so I've emulated that as well. (Also, I know that TMS wasn't high during the slow ~50 clocking of TCK after the first, but I've corrected that and it still doesn't work)
3. Coming out of slow TCKs into actual data. The Jtag-to-swd command, 0xE79E, is clocked in at 333kHz with the transitions while TCK is low and data stable throughout TCK high.