TMS570LS1114: Optimization level in CCS regarding ISO26262 - ASIL C

Sebastian Schöler

Prodigy 230 points

Part Number: TMS570LS1114

Dear support team,

Our safety related algorithms may challenge some runtime issues and need to be calculated faster.

The question is, up to which optimization level ( e.g. Level 1, Speed 5), can the code compiler be set?

Thank you and kind regard

Sebastian

over 4 years ago

+1 Sunil Oak over 4 years ago

TI__Mastermind 49120 points

Hello,

The TI ARM compiler qualification kit can help you with qualifying the specific compiler version and optimization settings for your use case.

You can request access here: https://www.ti.com/licreg/docs/swlicexportcontrol.tsp?form_id=258849&prod_no=ARM_SAFETI_CQKIT_RV___HERCULES_SAFETI_CQKIT_RV&ref_url=epd_mature_mcu_safety_mcu

+1 George Mock over 4 years ago

TI__Guru**** 251220 points

Sebastian Schöler said:
up to which optimization level ( e.g. Level 1, Speed 5), can the code compiler be set?

I presume you use the TI ARM compiler. There are five optimization levels. They are chosen with the option --opt_level=value. Where value can be: off, 0, 1, 2, 3, 4. For further details, including what optimizations are used at what level, please search the TI ARM compiler manual for the chapter titled Optimizing Your Code.

Thanks and regards,

-George

0 Sebastian Schöler over 4 years ago in reply to Sunil Oak

Prodigy 230 points

Hello Sunil,

thank you for the fast reply.

In the Safety CQKIT, I could find several succesful tests with code_state=16 for the 18.12.X.LTS compiler.
In our project, we have used a code_state=32 option so far. I have not found a single validation tests for this option.

So, regardsing safety relativ compiler validation with a tool like the PLUMHALL_C test, shall there be no use of the code_state=32 option?

Because we need the MCU to run as fast as possible, I think that code_state=32 will be a necissity.

Thank you and kind regards

Sebastian

+1 GregM over 4 years ago in reply to Sebastian Schöler

TI__Expert 5365 points

Sebastian,

Depending on the silicon version target, code_state gets a default value set if it wasn't set explicitly. For 7R4,5 the default is 32. So you should have plenty of coverage with test suite use cases.

Regards,
Greg

Arm-based microcontrollers

Arm-based microcontrollers forum

TMS570LS1114: Optimization level in CCS regarding ISO26262 - ASIL C