DRV110: Problems with hold current, keep time, and noisy FET gate drive

Part Number: DRV110

This circuit design was based on the previous posting (see DRV110EVM: DRV110 14 pin). Here it the updated design:

 

The expected values are as follows:

Ckeep = 100ms

I peak = 32 ma

I hold = 16 ma

Fosc = 25 kHz

 

Problem#1 is I hold = ~5ma and drops the solenoid contact. Additionally, very noisy hold current. Here is a screen shot of the trace. Blue is current probe of the solenoid. Yellow trace is the enable.

 

Problem #2 is that Ckeep =~80ms

 

Next, all I did was add a .1uf cap in location C133 and here are the results:

 

By decreasing R hold (R164) to 90K ohms I can get the solenoid hold current up to ~16ma. 

What are your thoughts on the circuit not functioning as intended?

  • Hi John,

    Appreciate your interest in using DRV110!

    Would you be able to re-upload images provided? The resolution is low, making it difficult to view your schematic and scope captures.

    Thanks,
    Kevin

  • Hi Kevin, Here are the pics in better resolution. Let me know what recommendations you have to get this working.

    Thanks

    -John

  • Thanks, John.

    This is interesting, I need you to provide additional info so that I can assess this better, if possible.

    1. What is the purple trace?

    2. Could you provide scope caps for TP53B, TP58B and TP59B?

    Regards,

    Kevin

  • Hi Kevin, The purple trace is the enable signal. I will send you the scope pics for the other TPs.

    -John

  • The yellow trace is the current through the solenoid. This is the same on all scope traces. The Blue Trace is TP53B (Vin)

    The BLUE trace is TP58B. Apparently, the capacitance of the scope probe is affecting this signal.

    The BLUE trace is TP59B

    Additionally, this is U26 pin 11 (OUT)

    And this is TP57B (STATUS)

    Thanks,

    John

  • Hi John,

    Thanks for sharing additional details on this.

    I'm taking a look at your setup, will have an update for you later this week.

    Thanks,
    Kevin

  • Hi John,

    Reviewed your setup to which I have additional questions/suggestions that may solve your initial concerns:

    Problem #1 - Unexpected IHOLD, also noisy. Want 16mA, getting 5mA

    Problem #2 - CKEEP (TKEEP) = 80ms instead of expected 100ms

    • Could you share details on your current limiting resistor calculation? Recommended values can be found on DS pg.16, table 3 - when EN is toggled high/low RS = 13k.
    • Any reason you choose 5.6ohm instead of 1ohm RSENSE value used per DS? 
    • Also, I assume you've verified your CKEEP value, have you tried increasing the capacitance (+0.1uF)?
    • Perhaps you could try modifying EN pin, etc to that similar in the reference design resource - TIDA-00289 Current Controlled Driver for 24-V DC Solenoid with Plunger Fault Detection Reference Design | TI.com
    • I wonder what would happen if you replaced your schottky diode with a normal pn diode.

    In an imperfect world we come across imperfect systems. Although your calculations are rugged, designs most similar to typical application in datasheet will likely exhibit most ideal behavior. Please feel free to share your thoughts on this, and I will try to replicate your setup to get back to you with a more concrete answer.

    Thanks,
    Kevin

  • Hi John,

    Another idea to decrease HOLD current noise is to include a pull down resistor on your gate, also, potentially include value for gate resistor to sink current (from OUT) most efficient with your FET.

    One more question - where is C133 on your schematic?

    Looking forward to your response.

    Thanks,

    Kevin

  • Hi Kevin,

    C133B is on the gate of the FET. In the schematics it is shown as the RED X (DNP).  The C133B  large capacitance (.1uf) is causing other problems but I can start by eliminating it and using only a pull down resistor on the gate of the FET. I will try a 1 k ohm pulldown and verify if it eliminates the gate noise.

    • I will update the circuit for when EN is toggled high/low RS to 13k. This was an error and missed on my part by using the existing 4.7k ohm pulldown. I reviewed the reference design but don't feel this should not cause the noise problem.
    • The 5.6 ohm Rsense was chosen based on using the DRV110  Device Parameter Selector.xls spreadsheet. It is not clear if TI or you are recommending Rsense = 1 ohm as per the DS. I was able to meet all the other Ipeak, Ihold, Tkeep, fPWM by using 5.6 ohms in the calculation.
    • I am not that concerned about Ckeep time being off but I did verify that the capacitance value is correct.
    • Yes, I can try a normal diode such as the part number US1B-13-F shown in the reference design.

    Any thoughts about the Zener voltage? The TI spreadsheet shows a recommended value of 7.725K ohms for a 24 v source. The existing circuit is using 4.99k.

    I will get back to you on my results.

    Thanks in advance for your help,

    John

  • Hi Kevin, Here are the results of some of the recommended changes:

    1. The 13 K ohm pulldown on EN has no effect on improving the circuit. Top trace in BLUE is EN. Bottom trace (yellow) is the current thru the solenoid.

    2. This is the circuit change with 13k ohm pulldown and 1k pulldown on the gate of the FET. Top is the gate voltage of the FET. The 1 k pulldown on the FET is eliminating some of the noise on the current trace shown in Yellow.

    3. This is the circuit change with 13k ohm pulldown on EN, 1k pulldown on the gate of the FET, and 7.75K ohm on R81. Top trace is the gate voltage; bottom is the current thru the solenoid.

    By reducing the Zener current for the internal zener on the supply pin helped to eliminate the noise. This change is required. 

    Now the circuit is functional because the solenoid is staying engaged. The hold current is approximately 14.5ma.

    Also, Tkeep is only 14.56ms and there is no PWM. So, these are the next issues.

    I didn't try to change the diode yet since I need to order that part.

    Please send me your ideas for next steps.

    Thanks,

    John

  • Hi John,

    I see it now! Overlooked that one, my apologies. Yes, let's avoid using gate capacitor.

     

    Correct, I meant for you to modify R81B from 4.99k to 13k, as this is the current limiting resistor. I think your 4.7k pulldown on EN is OK.

     

    Depending on the outcome of this modification, I would suggest you try different combinations with FET gate (series resistor, pulldown resistor) that satisfies FET requirements.

     

    Per, TKEEP, let's see what happens after aforementioned changes then proceed. Let me recommend section 7.3.2, pg. 9 of DS to help think about potential root causes.

     

    I can offer additional input later this week, let me know how this works out!

     

    Thanks,

    Kevin

  • Hi Kevin, Can you please escalate this issue to the TI DRV110 design team? This is a production design and the DRV110 does not work for this application. Please let me know if you want to handle this offline and not on the forum.

    I changed R81B to 13k and now the solenoid does not turn on at all. Blue pic is the gate of the FET. Now PWM is working but at 500hz. By the way, the spreadsheet (DRV110  Device Parameter Selector.xlsx) recommends 7.725 K ohms, 

    Here are the other parameters from the spreadsheet:

    Thanks,

    John

  • Hi John,

    I appreciate your patience to this matter. I can assure we will get to the bottom of this issue!

    Could you please share the rest of your calculations made using DRV110 parameter selector (sheet: DRV110 Zener)? The value of R_S depends on following items:

    • Zener current - where zener only conducts when V_IN > 15V
    • Auxiliary current (quiescent) - roughly 360uA
    • PWM frequency
    • FET gate charge
    • FET VGS

    With this information we should be able to figure out why the solenoid is not turning on/noisy current reading.

    Thanks again,

    Kevin

  • Hi Kevin, Here is the data from the spreadsheet that you requested. Now, I am coming up with 4.45K ohm (R81B) for my 24 volt Vin.

    Based on this data, R81B= 13K ohms is too high and the circuit won't work because I_Zener is less than the data sheet minimum (1 mA).

    I also  recalculated using I_zener = 1.28.ma. Now R81B comes out to 4.99K ohms. This is the R81B value from the original circuit and this value should work. 

    Let's discuss how you would like to proceed.

    Thanks,

    John

  • Understood, John, thank you for providing additional information, I will have an update for you by Wednesday of next week. 

    Thanks,

    Kevin

  • Hi John!

    As I am also experiencing some oddities with the DRV110 I had a look into this thread. After looking at all plots I have a rough guess: might it be that the supply voltage is not really stable? Could you perhaps also measure a plot of this one? And the pull-down at the gate seems to be detrimental as it acts like a voltage divider with the supply resistor when the output is enabled. This seems to drop the gate voltage way too low to fully enable the FET. And one last question: Which kind of coil have you connected? In the first few plots it seems to never reach a current that would b regulated although the FET is fully driven on.

    kind regards,

    Tobias

  • Hi Kevin, Please let me know of your progress by Wednesday. I appreciate the effort.

  • Hi Tobias, I don't have any pics but the 24V_IN volts is stable for the circuit. The solenoid is Clippard part# ETO-3M-24. Yes, the first plots are misleading and here is the reason why. The Ipeak setting for the DRV110 is never reached (32 mA). The current is limited by the design of the actual coil and is only 28mA. 

    The best scenario so far is using the 7.75k ohm for R81 (to limit the zener current) and the 1 k ohm pulldown on the gate of the FET. This allows the circuit to work but not as intended.

    I am not sure if the pull down on the gate of the FET is a real voltage divider with respect to the supply resistor. But, the pull down is causing the FET to turn on because Vgs is ~2 volts.

    Thanks for your ideas.

    -John

  • Thanks for the info! So you are only aiming to reduce the hold current and not the peak current, right? At a Vgs of 2V the DMN6140 are just barely conducting and most FETs have quite massive tolerances there, so I would still recommend increasing the pulldown value to get a more healthy Vgs. In one of the plots the FET seemed to be actually be in its linear region.

  • Hi John, Tobias,

    I recently picked up on this product and am still understanding it's quirks, again, I appreciate your patience and collaboration to solve this.

    So, the gate pull-down resistor is not needed for device to properly operate, let's first remove that. Next let's try setting RS = 5.7-5.9kohm (assuming IZENER = 1mA).

    And finally, let's re-evaluate the calculations based on desired peak and hold currents:

    The device acts like a hysteresis controller, allowing current to flow when VSENSE < VREF. My concern for the 5.6ohm resistor value is that, since peak/hold currents are low, the corresponding value of VSENSE may be too low, as you will achieve better accuracy when VSENSE is 300mV or greater (you mentioned the scope capacitance affecting your signal reading, initially). It helps to take a look at the relationship between peak/hold currents (below) and VSENSE (=(ISENSE/IHOLD/IPEAK) * RSENSE). As RSENSE increases, VSENSE increases.

    Let's try increasing VSENSE to that 300mV threshold.

    Would also be helpful if you could provide scope caps of following pins upon trying suggestions above: V_OUT, V_SENSE, I_SOLENOID, EN.

    Thanks and I hope this is helpful!

    Regards,

    Kevin

  • *Repost with intended screenshots*

    Hi John, Tobias,

    I recently picked up on this product and am still understanding it's quirks, again, I appreciate your patience and collaboration to solve this.

    So, the gate pull-down resistor is not needed for device to properly operate, let's first remove that. Next let's try setting RS = 5.7-5.9kohm (assuming IZENER = 1mA).

    And finally, let's re-evaluate the calculations based on desired peak and hold currents:

    The device acts like a hysteresis controller, allowing current to flow when VSENSE < VREF. My concern for the 5.6ohm resistor value is that, since peak/hold currents are low, the corresponding value of VSENSE may be too low, as you will achieve better accuracy when VSENSE is 300mV or greater (you mentioned the scope capacitance affecting your signal reading, initially). It helps to take a look at the relationship between peak/hold currents (below) and VSENSE (=(ISENSE/IHOLD/IPEAK) * RSENSE). As RSENSE increases, VSENSE increases.

    Let's try increasing VSENSE to that 300mV threshold.

    Would also be helpful if you could provide scope caps of following pins upon trying suggestions above: V_OUT, V_SENSE, I_SOLENOID, EN.

    Thanks and I hope this is helpful!

    Regards,

    Kevin

  • Hi Kevin, I tried the recommendations from your message and the updated spreadsheet. Now Rzener = 5.7k ohms and also removed the pull down resistor on the FET. The Rsense = 9.1 ohms and Rpeak = 200 k and Rhold = 50 K (as per the spreadsheet).

    Unfortunately, the circuit still does not work and the solenoid does not stay on.

    Top trace is current probe (I_solenoid) and bottom is the gate of the FET (V_OUT).

    This includes the Vsense signal. Now, when the solenoid is on the Vsense has increased to 256mV. The PWM is now working at 25Khz but the I hold is way too low. 

    Recall the requirements from the datasheet:

    FYI, if this applies to my design Rhold should not be less than 66.7k and we have it set to 50 K.

    Thanks,

    John

  • Hi John,

    Now it seems like your circuit is switching too fast, could you increase the resolution of ISOLENOID? I apologize for invalid parameter recommendation as I overlooked this item, makes sense IHOLD is not reading correctly here in this case. However, glad to increased sense voltage helped with PWM. Updated recommendations:

    I have a couple more suggestions:

    Do you know the inductance of your solenoid? It may help to add another coil in series with the driven inductor

    Have you modified the recommended RC filter at all? I suggest to try replacing 100pF with 1nF to increase time constant.

    Thanks,
    Kevin

  • Hi Kevin, I don't have a picture but verified that the switching is occurring at 25 Khz by checking the V_out pin.

    The manufacturer does not specify the inductance of the solenoid. It is Clippard, part number ETO-3M-24. 

    Yes, I tried tuning the circuit by changing the RC filter multiple times. However, there was no improvement in the operation of the circuit.

    Let me first try the new values from the table. I will get back to you with the results in 5 days.

    Thanks,

    John

  • Hi Kevin, 

    I am working with John to fix this issue. I modified the board based on the last post and this are the results. The picture is a bit cut but the current is 10ma per division. The pwm and hold current are good. The biggest issue right now is the noise that the circuit has.

    Thank you 

    Filipe

  • Hi Filipe,

    in my experience this looks a bit like a problem in either the layout of the PCB or noise that is being induced into the current measurement. Could you perhaps provede some info about both? The switching actually looks pretty neat :D.

    Kind regards,

    Tobias

  • All,

    Fantastic! Glad to hear your implementation is (almost) working now Slight smile

    Regarding your noise problem, the following suggestions may help you improve the circuit further:

    - Increase frequency/decrease ROSC. This may pull the frequency out of the audible range.

    - Use a better RC filter on SENSE pin. Sometimes audible noise is created by the ripple current created by noise on the sense pin.

    - Increase the hold current. This changes the charging/discharging characteristic of the the solenoid, reducing ripple current.

    I think we've tried these already, but due to the nature of analog products we need to tweak our values just right to achieve desired functionality.

    Hope this helps, keep me posted!

    Thanks,
    Kevin

  • Hi Kevin, We have been working on tuning the sense line and here are the results. The R81 =5.6K (Rzener)

    FYI, Rsense = 9.2 ohms; Rosc= 160K,  Rhold = 60K ohm. We increased the values of R103 to 10K and C137 to 22nF. Here is the result:

    Current trace is working. There is less hold current noise but still noisy.

    The sense line looks cleaner. Increasing the RC time constant beyond this eventually stops the PWM, cleans the noise, and maintains the peak current to ~28mA.

    Can you work on simulating this circuit using Tina? 

    Thanks,

    John

  • Hi John,

    Let me get back to you with TINA simulations by mid next week.

    Thanks,
    Kevin

  • thank you for that.

    -John

  • Hi John,

    Still working on this one, please allow me to follow-up with you by EOW.

    Thanks,
    Kevin

  • Hi Kevin, Please let me know if you were able to simulate this problem using Tina. I am looking forward to your recommendations.

    Thanks,

    John 

  • Hi John,

    Still no simulation, however, regarding the noisy signal, I have a couple of recommendations. Have you tried increasing your hold current? Another person experieced a similar problem with noise, please refer to thread here - (+) DRV110: Solenoid Driver Design. The Holding current will not increase much. - Motor drivers forum - Motor drivers - TI E2E support forums.

    Let me know if this helps or you still require a TINA simulation.

    Thanks,
    Kevin

  • Hi Kevin, Yes, I was able to increase the hold current by reducing Rhold. This does not reduce or eliminate the noise.

    As per the other thread, I did try increasing the equivalent of the evm board R7 and C1. It did not allow to operate as intended.

    Now I am focusing on disabling the PWM and making the hold current the same as the peak. 

    Thanks,

    John

  • Hi John,

    I will be taking over this thread from Kevin. Please give me 24 hours to over over the details of this thread and I will provide you with a reply soon.

  • Hi Pablo, Thanks in advance for helping. Please let me know any suggestions ASAP. I have been working on this for over two months with Kevin and the part does not behave according to the datasheet. I recommended that TI simulate this design using Tina but looks like Kevin was unable to do it.

    I will be happy to handle this conversation off line due to the sensitivity. Just let me know and we can connect outside of the forum.

    Thanks,

    John

  • Hi John,

    Understood. Let me get up to speed on this issue and I will get back to you asap.

  • Hi Pablo, DO you have any recommendations yet? Or, do you understand why the circuit is behaving this way?

    -John

  • John,

    I will discuss this with Pablo and get you a response tomorrow.

    Regards,

    Ryan

  • Hi John,

    Apologies for the late reply.

    I met with Kevin yesterday to discuss this in detail. Can you provide more information about the solenoid you are using. What is the inductance and resistance? I can work on the TINA simulation.

    It looks to me that the main concern here is the HOLD current being low and the noise in the output current. Let's tackle the HOLD current issue first. You are able to increase the hold current to the desired value by decreasing RHOLD. So it seems this fixes this issue. Now going back to the noise in the current, This may be due to PCB layout or noise being coupled to the output terminal of the solenoid. Can you share the PCB layout? You can send it via private message if you don't wish to share in the public forum.

    In the meantime, let's try to the following to minimize the noise in the output current:

    1. replace R102B with 15Ω. This will slow down the output voltage (at the drain of the MOSFET) rise time which will help minimize the current spikes.
    2. Add a capacitor to C133B. I know you have already tried 0.1µF and it seems to help minimize the noise. Can you try other values (100p - 0.1µF). Based on the waveforms, there is also a lot of noise on the gate voltage which may be getting coupled on the output or enabling the FET for brief moments causing the large current spikes. The capacitor will short some of the high frequency noise to GND.

    A few other questions:

    • Has this behavior been observed in other units?
    • Have you tried replacing the IC with a new one? Is the issue still present?

  • Thanks Ryan, I will follow up with Pablo using his private email

    -John

  • I will follow up with your questions via private email.

    -John