DRV8343-Q1: SPI Valid SDO Data Output Timing

Shinichi Yokota

Genius 9715 points

Part Number: DRV8343-Q1

Hello,

When reading a value from a status register on DRV8343-Q1's SPI, which timing does a valid data come from the SDO?

Best regards,
Shinichi Yokota

over 3 years ago

0 Aaron Barrera over 3 years ago

TI__Mastermind 26046 points

Hi Yokota-san,

SDO data is propagated on SCLK rising edges and should be captured on SCLK falling edges.

Ensure SPI clock phase and clock polarity is 0 to read SDO outputs correctly. If you have questions please follow this E2E FAQ on SPI configuration and use: e2e.ti.com/.../faq-spi-configuration-and-use

Thanks,
Aaron

0 Shinichi Yokota over 3 years ago in reply to Aaron Barrera

TI__Genius 9715 points

Aaron-san,

I've created a picture to explain the question. Is it correct?

Best regards,
Shinichi Yokota

+1 Aaron Barrera over 3 years ago in reply to Shinichi Yokota

TI__Mastermind 26046 points

Hi Yokota-san

Yes this info is correct. Please reference section 8.5 Programming in the datasheet.

Thanks,
Aaron

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DRV8343-Q1: SPI Valid SDO Data Output Timing