• State TI Thinks Resolved
  • Locked Locked
  • Replies 10 replies
  • Answers 3 answers
  • Subscribers 31 subscribers
  • Views 908 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Original question:

DRV8305: Setting half-bridges to Low, Pwm, or Hi-Z

DRV8305: RE: DRV8305: Setting half-bridges to Low, Pwm, or Hi-Z

v01d
Expert 2025 points
Part Number: DRV8305
Other Parts Discussed in Thread: DRV8306, DRV832X, DRV8343-Q1, MCT8316Z, MCT8316Z-Q1, DRV8304

e2e.ti.com/.../3963447

Sorry I have to come back on this thread that was locked now, due to me taking long. But I need it again.

".. So the assumption you had above if using the HH or LL state would generate a high-z output just like in the 6x PWM mode is incorrect. The only input that makes a difference is the input at the INHx pin and INLx could be either high or low and generate the same outcome. ".

But, what about if I switch from Output (or PWM peripheral mode, to be correct), to I/O Input on those GIOs, will this then create high-z on the relevant  inputs?  This means I will be switching from PWM mode to IO on those outputs, and I'm not sure how this would co-work with the half-bridges.

  • 0
    TI__Mastermind 26046 points

    Hello,

    In 6-PWM mode, this is the truth table:

    You can Hi-Z a phase output by setting INHx/INLx = 0 or 1 at the same, because this makes GHx/GLx = L.

    This should also work if you make the I/O pins inputs, generally this results in Hi-Z state so logic is driven externally, in this case the pulldown resistors for INHx/INLx in the DRV8305. 

    In 3-PWM mode, this is the truth table:

    There is no way to Hi-Z the gate driver outputs GHx/GLx in this mode, regardless if the inputs are high, low, or Hi-Z. 

    Thanks,
    Aaron

  • 0 in reply to Aaron Barrera
    Expert 2025 points

    Hello Aaron & thanks for replying again.

    I did see the truth tables to say the truth ( a pun sorry ), but  I'm with more dumb questions then:   

    does this mean i cannot do a simpler phase driving with this particular board, unless I use 6 PWM..?  I don't understand why I need 6 PWM perihperals if I can use the inverse of one PMW as input  to one of the gates, so .. .why x2 the PWM peripherals, which also means extra steps to make sure they in-sync ?

    I will be rewatching your original references /TI study guides, but I still have this picutre that this is an overkill of using 6 PWM's for a simple trapezoidal commutation.  I know this is is something obvious I do not see, but I only tiped toe into motor control still lots to learn

  • 0 in reply to v01d
    TI__Mastermind 26046 points

    Hello,

    DRV8305 is an older device (released around 2015 timeframe). PWM control modes are 6-PWM, 3-PWM, and 1-PWM. 

    I believe what you're looking for is a 1x PWM interface, where 1 PWM is required to commutate a motor using the internally stored commutation table. The input PWM frequency and duty cycle will be the BLDC motor's output PWM frequency and duty cycle. The mode provides synchronous modulated PWM input signals for the MOSFET gates. See below for block diagram for DRV8305.

    This was our first "1-PWM mode", so it is not as robust as 1x PWM mode in future devices below. 

    We support the 1x PWM mode with BRAKE and DIR inputs in DRV832x, DRV835x, DRV8304, DRV8306, DRV8343-Q1, MCT8316Z, and MCT8316Z-Q1. 

    6x PWM mode is useful for setting dead time from the MCU inputs, you have full control of each PWM signal and thus each 1/2 bridge state. 

    3x PWM mode is useful for synchronous PWM inputs, where the state is controlled by INHx. It does not support Hi-Z modes in DRV8305, but devices such as DRV832x, DRV835x, DRV8304, and DRV8343-Q1 use INLx to control whether the bridge is Hi-Z, and you can still control each half bridge independently. 

    Thanks,
    Aaron

  • 0 in reply to Aaron Barrera
    Expert 2025 points

    Very interesting,

    Question on this :

    Aaron Barrera said:
    3x PWM mode is useful for synchronous PWM inputs, where the state is controlled by INHx. INLx can be a GPIO to control whether the bridge is Hi-Z, and you can still control each half bridge independently. 

    I sort of understand this in contradition to what you wrote earlier : that the truth table does not support it, and, I cannot set the bridge into Hi-Z through GPIO setting. Did I get that wrong too?

    I'm convinced that's the mode I want, 3xPWM.   (Setting to Hi-Z I need for reading BEMF ..)

  • 0 in reply to v01d
    TI__Mastermind 26046 points

    Hello,

    I apologize, I made an inaccurate statement above and edited it to reflect it correctly. 

    DRV8305 3x PWM mode does not support Hi-Z mode. 

    DRV832x, DRV835x, DRV8304, and DRV8343-Q1 3x PWM mode supports Hi-Z mode using INLx as a GPIO control input to control whether the state is in Hi-Z or synchronously driving the HS/LS FET.

    Thanks,
    Aaron

  • 0 in reply to v01d
    TI__Mastermind 18981 points

    Hello, 

    Thanks for pointing out the contradiction - please let us know if the updated answer below resolves your question 

    To help clarify, for this DRV8305 device, 

    1. 3xPWM mode uses only INHx to toggle the outputs according to the truth table
      1. Hi-Z not an option in this mode, since the INHx input for each phase dictates GHx/GLx 
      2. this mode is meant for simpler control (fewer PWMs) and will also help handle the dead-time insertion automatically between GHx/GLx output toggles, so that there's not a shoot-through event 
      3. however, there's no state here where both HS and LS FETs are OFF (e.g. phase half-bridge Hi-Z) 
    2. 6xPWM mode uses all INHx/INLx to toggle the GHx/GLx pins independently of one another  
      1. The user is able to command both GHx/GLx OFF at the same time, effectively causing phase half-bridge to Hi-Z 
      2. in this mode, the device still has deadtime enforcement, but user has full control over deadtime between INHx/INLx transitions 
      3. the truth table below also helps prevent both MOSFETs from being on at the same time (note INHx=INLX=1 causes both GHx/GLx=L) 

    dead-time example in the gate-drive waveforms: 

    Best Regards, 
    Andrew 

  • 0 in reply to v01d
    TI__Mastermind 18981 points

    Hello, 

    Can you let us know if our answers above helped answer your questions?

    If so, please help mark the thread as resolved - or let us know if you require additional assistance. Thanks!

    Best Regards, 
    Andrew 

  • 0 in reply to Andrew Liu
    Expert 2025 points

    Hello Andrew,

    Sorry I'm multi-tasking between too many things atm, so I really appreciate the answers but I would like to ask not to close this thread yet / too fast..

    As this is in relation to my study, I appreciate if I can carry on a bit longer with this thread, and review your answers asap.

  • 0 in reply to v01d
    TI__Mastermind 18981 points

    Hello, 

    Sure - May I propose that we keep the thread open another week, and if the debug takes longer than that, you can always save this e2e link (as it is on e2e for longer-term reference) and click 'ask a related question' to point back to this discussion? 

    As long as you reference this product it should end up back in our queue anyway & our BLDC Applications team will support accordingly

    Best Regards, 
    Andrew 

  • 0 in reply to Andrew Liu
    TI__Mastermind 18981 points

    Hello, 

    Closing thread for now - but as mentioned above, please feel free to click the button for 'ask a related question' and reference this e2e thread to continue the conversation. Thanks!

    Best Regards, 
    Andrew