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DRV8300DIPW-EVM: Not sure if shot-through or other problem

Part Number: DRV8300DIPW-EVM
Other Parts Discussed in Thread: INA240, INA286

Hi,

I'm using a DRV8300DI (Inverted) gate driver IC and at the moment I have some trouble with the current measurement (Low-Side Measurement). 

I already have an article here and I changed from the INA286 to the INA240, but still have trouble: https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1103739/noise-in-current-measurement

So I'm thinking, that it has nothing to do with the CSA, but something to do with how I switch the MOSFETs.

Problem:

I see strong pulses on the CSA output from the INA240, where the pulses got stronger when I increased the gate resistor from 10Ohm to 39Ohm:

What I noticed when I increased the resistor to 39Ohm is, that the MOSFETs get warm (35°C) without any load and I have 3000mm2 for cooling. 

Schematics:

Layout:

TOP

GND

PWR

BOT

Output with 10Ohm gate resistor and 200Ohm output resistor (SHA) to GND:

Output with 39Ohm gate resistor and 200Ohm output resistor to GND:

Edit:

I made some more measurements today and I don't really think I have a shot through, but probably the Cds capacitance is coupling into the shunt, where the shunt has a non negligibale inductance and that leads to a glitch. The following measurement is with a spring probe over the low side shunt of 300uOhm, so that is probably the noise, that the CSA is reacting to. It is a really fast input, so I will try to use an input filter in the next design anyway. The noise comes probably from the inductance of the shunt and when the low-side switches, Coss is shorted to GND and this probably is the reaction from it. 

Is it really possible, that the INA240 (and also the INA286) react with such a step response to a such fast transient? 

Edit 2:

When I add an input filter to the amplifier, I can drastically reduce the glitches, so I think this really fast transients activate a step response, that is way way slower. With a better filter I think I can handle them, but my question ist now, how fast pulses on the input still lead to such a step response? Does any dirac puls give me the step response stated in the datasheet? So probably for low side shunts it would be beneficial to use a very fast differential amplifier with >10MHz bandwidth and an input filter. Since the low side fet will always shunt the Cds, there will always be a spike over the shunt and especially for low shunts and high CSA amplification, there will be less damping and this leads then to more noise on the output. I will probably go for in-phase current measurement with the INA240, but I'm unsure if this might also give problems with the 100V/V amplifier and 300uOhm shunt or do you think, the INA240 can handle this better?

  • Hi Sebastian,

    Today is a holiday in the US, we will get back to you tomorrow. 

    Thanks,
    Aaron

  • Hi Sebastian, 

    Thanks for reaching out to the e2e motor drivers forum - a few comments below, to assist in the debug: 

    1. for the amplifier-specific questions about INAxxx products, may need to refer back to the expert at the Amplifiers e2e forum for a detailed & robust answer 
    2. for the motor-driving side of things,
      1. CSA filtering
        1. this is an essential part of ensure accurate motor current feedback & we do have some best-practices tips on how to achieve this 
        2. if your CSA noise coincides with your PWM frequency, it could just be the PWM signals and motor current frequency coupling into your shunt feedback
        3. the below resources help describe what to do in terms of placement and routing for PCB layout, and possibly also filtering components
        4. you'll want your filter cutoff frequency to be 10x higher than your PWM frequency, so that it doesn't unintentionally filter out your real feedback 
        5. and lastly, you'll want to fine-tune your capacitor value at CSA outputs so that it doesn't cause the settling time to be too large 
      2. Gate Drive Current
        1. turning on the MOSFETs too quickly can have consequences in terms of EMI and acoustics. 
        2. generally we suggest that the user tunes the gate-drive slew rate such that the MOSFET turn-on time is >100nanoseconds 
        3. 100ns is aggressive, so operating slower (e.g. 200ns, 400ns) will make the waveforms smoother & more controlled 

    Resources: 

    For some of your gate drive signals specifically, 

    • this could be a measurement error as you mentioned (e.g. parasitic inductance and capacitance on the probes themselves or other parts of the PCB) 
    • it could also be considered 'Ringing' from your MOSFET switching speeds (e.g. slamming the MOSFETs ON/OFF too quickly w/ high slew rate) 

    Please let us know if this resolves your questions. Thanks! 

    Thanks and Best Regards, 
    Andrew 

  • Hi Andrew,

    Thanks for your answer. The noise coincides with the PWM frequency and seem to have to do with the shunt inductance, since I can measure this waveform from above over the shunt itself. I doupt it is coupling into the probe itself, since I measured with the spring probe and when I measure from GND to the shunt low-side, I can see how the HF noise decreases as it reaches the HF path to the vias.

    You are probably right, that the turn on is too steep. I already tried out 39 Ohm gate resistors which gave me around 100ns turn on time, but this also lead to shot-through, since the Cgd was strong enough to push GLx into a high state for several ns. Probably a anti parallel path with a schottky diode for faster turn off will stop this.

    How do you define the turn on time? Is it for SHx to reach 90% of it's final value?

    Here is also an interesting discussion about the INA240, it is probably not the best fit for low side current measurement: e2e.ti.com/.../ina240-high-freq-dv-dt-transients

    Kind Regards,

    Sebastian

  • Hi Sebastian, 

    Sounds good, and thanks for the response - please see updated guidance below, and let us know if this resolves your questions. Thanks!

    My turn-on time best-practices of being more than 100ns is not an explicit datasheet spec, so it's loosely defined by looking at waveforms. 

    • I would say your definition of transitioning from 0% voltage to 90% voltage is probably a good metric, assuming a somewhat linear MOSFET charge-up profile. 

    Your suggestion for preventing shoot-through by having stronger SINK current than SOURCE current is exactly what we recommend from a system design perspective. The smart gate drive app note goes into this as well, but the components are just comprised of resistors and diodes as mentioned. 

    Best Regards, 
    Andrew