DRV8718-Q1: questions about test on DRV8718S-Q1 EVM

Elec Cheng

Part Number: DRV8718-Q1

Hi Expert,

I have some test on DRV8718-Q1 EVM and find some questions. PVDD is connected to 8V.

1. When stop gate drivers, I can still test 8V on all output pins. Take below HB1 as example, GH1=OUT1 =8V, GL=0. Is that normal?

2. I change source & sink current capability. HB1has four times larger than HB2. But on the oscillators, the measurement is as below. It makes sense to the rising time difference, as 4 times. But for the falling time, why is only about 2 times larger whereas sink current capability is 4 times larger? May you help explain? Thanks.

	rising time	falling time
HB1	72.66ns	73.06ns
HB2	267.5ns	174.3ns

BR,

Elec Cheng

over 2 years ago

0 Shinya Morita over 2 years ago

TI__Mastermind 44515 points

Hi Elec,

Thank you for your questions.

1) Yes, it is normal. When output are Hiz mode, DRV have very weak pull up to PVDD level. Since very weak pull up, cannot drive load.

2) If register setting are same, HB1 and HB2 rise and fall time should be similar I guess.

regards

Shinya Morita

0 Elec Cheng over 2 years ago in reply to Shinya Morita

TI__Expert 7055 points

Hi Shinya,

Shinya Morita said:
When output are Hiz mode, DRV have very weak pull up to PVDD level

Why do we have the weak pull up? The weak pull up is done via a large pull up resistor?

Shinya Morita said:
f register setting are same, HB1 and HB2 rise and fall time should be similar I guess.

I guess so too. But my confusion is, why the falling time is not 4 times larger whereas sink current capability is 4 times larger? The rising time seems align with 4 times. May you help explain? Thanks.

BR,

Elec Cheng

0 Shinya Morita over 2 years ago in reply to Elec Cheng

TI__Mastermind 44515 points

Hi Elec,

-It is not resistor pull up.

-Unfortunately I do not have idea how it different.

regards

Shinya Morita

0 Elec Cheng over 2 years ago in reply to Shinya Morita

TI__Expert 7055 points

Hi Shinya,

Shinya Morita said:
Unfortunately I do not have idea how it different

So from your understanding, the rising time and falling time should be the same, right? Thanks.

BR,

Elec Cheng

0 Shinya Morita over 2 years ago in reply to Elec Cheng

TI__Mastermind 44515 points

Hi Elec,

Yes, If register settings(IDRIVE etc) are same, rise and fall time should be similar since driving same FET.

regards

Shinya Moritta

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DRV8718-Q1: questions about test on DRV8718S-Q1 EVM