Hello,
I'm using the gate driver DRV8323 with software deadtime and have a few questions regarding the timing behavior.
- Where does the t_drive exactly starts? At the input signal change or after the propagation delay, so when the driver starts to set the I_drive current and the gate-source voltage starts to change?
- The picture below shows a software deadtime of 1000 ns, a t_dead of 200 ns and a t_drive of 4000 ns.
The two cursors are marking the time between the signal change of the highside FET (red) and the point where the gate-source voltage starts to rise.
Where does this time results from? I would expect to see just a propagation delay here.
Can you please describe the DRV timing behavior here? - The picture below shows a software deadtime of 1400 ns, a t_dead of 200 ns and a t_drive of 1000 ns.
The timings are chosen that the switch-on pulse (Digital 4) for the highside FET (red) occurs when the t_drive is already over.
Which timing can we expect here (marked with the cursors)?
Thank you in advance for your answer
Tobias Widmann