DRV8328: DRV8328 Burning MOSFETs

.Hey Alex,

Thank you for the question. I have a assigned a team member to look into this and provide feedback.

Best,
Akshay

Hi Alex,

Could you please provide more information on what FETs and voltage supply you are using? Are you noticing nFAULT pull low when this occurs?

Some typical causes of MOSFETs burning up include high current or voltage rating violations. nFAULT might indicate if there is a VDS overcurrent event, but it appears that you have disabled VSENSE overcurrent detection by connecting LSS to ground.

Best,

Davis

We are using the SQS174ELNW-T1_GE3. Running at 25V PVDD/VBAT_IN.

https://www.mouser.com/ProductDetail/78-SQS174ELNW-T1_GE3

The nFAULT pin isn't being monitored currently.

Hi Alex,

Can you please provide a waveform image of GHx, GLx and SHx on the same phase when this occurs? This will be helpful to determine whether an overcurrent event is happening.

Best,

Davis 

I don't have waveforms when the failure occurs. Only on the bench with a motor under no load.

Hi Alex, 

Could you please identify which waveform is which in the image?

Thanks,

Davis

Yellow is the motor phase. Green is the low side gate, blue is high side gate.

Hi Alex,

I will need to confirm, but I suspect the ringing on the GHx and GLx nodes might be causing a shoot through event. You can measure the height of the ringing above ground (for GLx) or the phase voltage (for GHx) and compare it with the threshold voltage of the MOSFET to confirm.

One option would be to further increase the gate resistance to reduce the slew rate, or you can select a MOSFET with higher Qgd. Alternatively, you can refer to this app note for information on creating a snubber circuit to reduce ringing: https://www.ti.com/lit/an/slvaf66/slvaf66.pdf?ts=1722634648974. Lastly, make sure your board layout follows the best practices outlined in this app note: https://www.ti.com/lit/an/slva959b/slva959b.pdf. Long traces between the gate driver and the gate can introduce parasitic inductance that increases the ringing.

Lastly, what PWM frequency are you using? High switching frequency will also generally increase power loss, which will heat up the MOSFETs.

Best,

Davis

Thanks Davis.

PWM frequency is 24-48kHz. Gate traces are short, about 7mm.

Gate resistor calculator for the SQS174ELNW. They do have a low Qg and Vth.

I'm looking at switching to the IAUCN08S7N013 which have a higher Qg and Vth with a lower Rds.
The gate resistor calculator shows an 11 ohm resistor for these with the datasheet fall time of 25ns.

One question I have is about the Vds fall time. Is this supposed to be the fall time from the FET datasheet, or the desired fall time?

Hi Alex,

I believe the fall time in the FET datasheet is a dynamic parameter dependent on the design, the so both that one and the one in the calculator are desired and a product of the design. The calculator will give the gate resistance that should theoretically achieve the desired fall time. The VDS will fall quicker with a higher current that can supply more charge to the inherent gate to drain capacitance, so the slew rate is inversely proportional to the gate resistor.

I would also recommend making sure your traces are as wide as possible. The board design techniques plus a higher gate resistance and Vth should hopefully stop cross-conduction if it is occurring.

Best,

Davis