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DRV8711: DRV8711 SPI MODE (0, 3)

Kyungtae Nam
Prodigy 30 points
Part Number: DRV8711

Tool/software:

I want to know the SPI Mode supported by the DRV8711 part.

If you look at the DRV8711 part Datasheet, you will see the SPI Data Format as shown below.

Looking at the picture, it seems to support SPI Mode 0 and SPI Mode 3. I would like to inquire if my judgment is correct.

SPI Mode 0

SPI Mode 3

  • 0
    TI__Expert 4730 points

    Hi Kyungtae, 

    Thank you for asking questions in this forum. The SPI shifts data at rising edge of clock signal "SCLK."

    As shown in the figure, To send data through SPI, First the SCS should go high and then the data will be shifted by rising edges. Also, To complete the read or write transaction, SCS must be set to a logic 0.

    Please let us know if you have any more questions. 

    Best regards

    Mojtaba

  • 0 in reply to Mojtaba Afshar
    Prodigy 30 points

    Hi Mojtaba

    Thank you for your reply.

    There are four modes in total in SPI Mode, as shown in the figure below.

    Looking at SPI Mode, there are two ways to support sampling at the rising edge.

    There is SPI Mode 0, where the first edge of the clock is rising, and SPI Mode 3, where the second edge of the clock is rising.

    In both modes the CS signal is High.
    So, does DRV8711 support both SPI Mode 0 and SPI Mode 3?
  • 0 in reply to Kyungtae Nam
    TI__Expert 4730 points

    Hi Kyungtae,

    Thank you for your clarification. 

    As shown below, you can actually use both mode0 (CPOL=1, CPHA = 0) and SPI Mode 3 (CPOL = 1, CPHA = 1) with the DRV8711 because, in both Mode 0 and Mode 3, data is latched on the rising edge of the clock (SCK). The key difference between the two modes is the idle state of SCK:
    • Mode 0 (CPOL = 0, CPHA = 0):  Clock idles low (0). Data is captured on the rising edge.
    • Mode 3 (CPOL = 1, CPHA = 1):  Clock idles high (1).  Data is also captured on the rising edge.

    Since the DRV8711 shifts data on the falling edge and latches it on the rising edge, both Mode 0 and Mode 3 should work correctly, assuming your SPI master device handles clock polarity changes appropriately.

    Please let me know if you need more clarification. 

    Best regards, 
    Mojtaba.