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DRV8876: disabling the overcurrent protection

Part Number: DRV8876

Tool/software:

I have a follow up question for the E2E thread listed below: 
https://e2e.ti.com/support/motor-drivers-group/motor-drivers/f/motor-drivers-forum/1071091/drv8876evm-run-tec-with-lc-filter

I am trying to filter PWM using an LC filter as described in the above E2E thread. 

I have two questions:
1) Can I disable the Over-Current protection of the DRV8876? The data sheet states:

The internal current regulation can be disabled by tying IPROPI to GND and setting the VREF pin voltage greater than GND (if current feedback is not required).

however, it isn't clear to me if this disables the over-current protection and fault? 
In other words, if I tie IPROPI to GND and VREF > GND would I be able to use output capacitors that are 100uF without faulting? 

2) It states that the maximum PWM frequency is 100kHz. Is this limit due to OCP requiring a minimum on time of 3us, or for some other reason? 
what would happen if I ran this part with a 250kHz switching rate?

Thanks

  • Hi Mark,

    1.

    The Overcurrent Protection threshold (OCP) is set internally and can't be adjusted. This threshold is designed to protect the device from excessive currents, such as shorts. If the output current exceeds the overcurrent threshold, IOCP, for longer than tOCP, all MOSFETs in the H-bridge will be disabled and the nFAULT pin driven low.

    The Current Regulation threshold (ITRIP) is set externally through a combination of the VREF voltage (VVREF) and IPROPI output resistor (RIPROPI). This threshold should be set as the max amount of current for the given application. The ITRIP threshold should be set lower than OCP.

    2.

    Yes, the max PWM frequency is set to limit the deglitch time of 3us. However, it's also designed for propagation delay and duty cycle resolution. If the PWM frequency is increased beyond 100kHz, the duty cycle will lose resolution for lower and higher duty cycle range. This can be observed on a o-scope if looking at input and output PWM. The higher the frequency, you will see the input duty cycle and output duty cycle begin to not match. In other words, the accuracy of the duty cycle will be reduced (between inputs and outputs) when max PWM frequency is exceeded. 

     Best,

    David