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DRV8842 Operation Error

Other Parts Discussed in Thread: DRV8842

Hello TI E2E Community members,

There's currently an error with the DRV8842 (http://www.ti.com/product/DRV8842) when it is configured in this circuit. 

U3, U4, and U5 are optoisolators that separate a 3.3V plane from the 12V plane that powers the H-bridge. 
The problem is that when the 12V plane is powered on first, then subsequently the 3.3V, the pin I4 on the H-bridge draws an abnormally high amount of current. 
This results in voltage levels that are too low on nSleep and nReset, so the H-bridge remains in sleep mode.
A power up in the reverse order, 3.3V then 12V, results in proper functioning of all components. 

I know that I4 is the pin that is drawing an excess amount of current, because when it is tied to ground or left floating, the same voltages are seen regardless of power up order. Unfortunately, even though I am not using the current control function of the H-bridge, one current control pin (I0 to I4) must be set high to actuate the load. I tested this myself and it was confirmed by a TI employee. 

Interestingly, when I implement an ideal switch instead of the optoisolator U5, either power up order works. By an ideal switch I mean removing the optoislator, powering the 12V plane, then connecting wire 4 and 3 together where the opto U5 used to be.

I have also tried using a MOSFET instead of the BJT within the optoisolator, but the same problem is seen.
To rectify the situation, I have tried tying I4 to V3P3OUT to keep it logic high that way instead, but when I do this V3P3OUT is destroyed somehow and then it outputs zero volts instead of 3.3 volts.   

Any insight to this peculiar behavior of I4 would be highly appreciated.

Thank you,
~Jonathan  

  • Hi Jonathan

    The preliminary advise is that you should add a VM cap ~100uf together with the 0.1u and put it close to VM pin and GND plane.

    Also should check and keep the load of V3P3OUT <1mA at any condition if we want to use it. Also it is better to keep your logic inputs High at the same level and <5.25V. Your logic High to nSleep, nReset, and I4 is a bit high and not stable that effected by nfault.

    We will investigate your problem more deeply and update later.

    Thanks.

    Wilson

    Motor Application Team

     

  • Here is a scope capture of the voltage levels, during different orders of power ups.



    The problem of  the lower voltage levels during a 12V then 3.3V power up has been narrowed down to I4, because when I4 is tied to ground, The voltage levels are the same (about 5.20 V) on nSleep and nReset regardless of the power up sequence. 

    This problem has been looked into before in this post here  http://e2e.ti.com/support/applications/motor_drivers/f/38/t/259099.aspx
    But a solution was never found. I was wondering if any further insight could be gained, now that it is clear I4 is the problem source. 


    Thank you,
    ~Jonathan  

  • Hi Jonathan,

    Thanks for the additional information.

    If you power up only the 12V, what voltage do you see at I4? Even if current is flowing through all resistors I4 should not be lower than ~2.5V.

    Is it possible that the schematic and layout do not match, and the I4 layout trace is connected to an additional signal? I4 as a digital input should require approximately 100uA, and V3P3OUT can provide 1mA. It makes me think that I4 is much lower impedance than expected. That would explain damage to V3P3OUT when connecting I4 directly to V3P3OUT.

    Please check on the PCB that all grounds are connected (pins 14, 28, and the power pad).

    When you say that you are tying I4 to ground is there a jumper on the board to allow this? Are you cutting traces on the board to tie the pin to GND?

    If you find nothing can you provide the layout of the board, and the part numbers of the optoisolators?

     

  • When I power up only the 12V, I see a voltage of 0.00 Volts on I4. 


    I suppose it is possible that I4 is connected to an additional signal, although I'm not seeing that on the PCB or layout. Here is the layout of the board:

     

    2021.SP-CM-STM V2.2.zip

    When I am tying I4 to ground I'm simply lifting the pin from the pad, soldering a wire to it, and connecting the other end of the wire to ground.

    The part numbers for the optoisolators are:

    PS2801C-1    for U5 and U4 

    ACPL-227      for  U3

    but I don't believe the optoisolators are the issue since the exact same problem occurs using a MOSFET instead of the optoisolator U5. 

  • Hi Jonathon,

    What layout program are you using? Is a free viewer available for it?

    A quick check makes me concerned about the connection to pins 16 and 17. The via under the device appears to be very close to the thermal pad. Is this correct? If so, it could short to ground.

    If so, can you cut the trace for pins 16 and 17 under the device, and the trace on the bottom of the board running to the via. Then check the voltage at pin I4 again. If  the voltage is good, connect pins 16, 17 using a wire from the via near R6,R7 and see if the part works as expected.

    I will continue looking at the layout once I obtain the viewer.  Thanks.

  • Hi Rick, 

    Yes I can test that possibility. I will get back to you with the results.
    In the mean time the viewer for the layout program is called Diptrace and a free viewer for it is
    available here: http://diptrace.com/download.php

    Diptrace 2.3 Freeware  

    Thank you, 
    ~Jonathan