DRV8301 charge pump regulator

Hiroyasu Matsubara

Other Parts Discussed in Thread: DRV8301, DRV8303

Hello,

I have a question about DRV8301.

There is a case that when DRV8301 "GVDD under voltage" occured,then cannot clear the fault if toggle EN_GATE or reset by SPI communication,and the charge pump regulator didn't restart,and GVDD voltage remains low.

How should I treat about this case ?

I would appriciate if someone could reply to my question.

Hiroyasu

over 11 years ago

0 Wilson Zuo over 11 years ago

TI__Mastermind 26065 points

Hi Hiroyasu

How low when you say GVDD is remaining low?

Also there must be some thing wrong on the application if GVDD is abnormal. Could provide the schematic of DRV8301? layout or scope capture will be good if you can provide as well.

Thanks.

0 Hiroyasu Matsubara over 11 years ago in reply to Wilson Zuo

Expert 1405 points

Hi Wilson,

Thank you for your reply.

I update the schematic of DRV8301.

Please check the schematic.

Hiroyasu

8182.schema.pdf

0 Wilson Zuo over 11 years ago in reply to Hiroyasu Matsubara

TI__Mastermind 26065 points

Hi Hiroyasu

I checked your schemtic and looks like no issues.

Some comments below:

1. Could you check the layout on GVDD, AVDD, DVDD, PVDD1 bulk caps? all should be placed close enough to the PINs and have a low impedence path to Power ground (Pin57).

2. PIN57(Power pad or thermal pad) must must be well soldered to GND plane. If not, the device will not function correctly. (Sometimes a hot gun will failed to solder it truly well by hand. A pre-solder plating to the Power PAD before solder is preferred.)

3. Swap the device which may be damaged, and test again.

Thanks.

0 Wilson Zuo over 11 years ago in reply to Wilson Zuo

TI__Mastermind 26065 points

BTW, if you will not use the BUCK on-chip, DRV8303 will be a perfect alternative which is just the DRV8301 - Buck.

Thanks.

0 Hiroyasu Matsubara over 11 years ago in reply to Wilson Zuo

Expert 1405 points

Hi Wilson,

Thank you for your reply.

Is there any possibility that the phenomenon is concerned with the DRV8301 setting "Gate driver peak current", which could be set by SPI communication ?

Hiroyasu

0 Wilson Zuo over 11 years ago in reply to Hiroyasu Matsubara

TI__Mastermind 26065 points

Hi Hiroyasu

Do you mean the Gate driver peak current is unproperly reset? Normally the GVDD voltage should be normal at all the Gate driver peak current settings.

Also, it is possible that the SPI or the registers meet reset issue during high current or noisy conditions. A good layout will improve or avoid this issue. Please refer to the application reports below.

http://www.ti.com/lit/an/slva552/slva552.pdf

I'm not sure about whether there is similar issue as the reports here. Please have a deep check on the layout.

Besides, if the MOSFETs have too large Qg to be driven by the gate driver, maybe we should lower the PWM frequency or increase the limit resistors to the Gate of MOSFETs.

Thanks,

0 Hiroyasu Matsubara over 11 years ago in reply to Wilson Zuo

Expert 1405 points

Hi Wilson,

Thank you for your reply.

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DRV8301 charge pump regulator