I want to confirm about DRV8305-Q1.
Q1.
I understand like an attached file.
Do bits D9 to D8(tDRIVEN) of register 0x5 appropriated to tDRIVEN_LS in Figure 11?
Also,
Do bits D9 to D8(tDRIVEP) of register 0x6 appropriated to tDRIVEN_HS in Figure 11?
Q2.
Is there information on the VGS monitor's High and Low thresholds and variances?
(There is no information in the data sheet.)
-Harukawa
