DRV8701: DRV8701 POWER APPLICATION

Hi Lorenzo,

Can you provide a scope shot showing the nFAULT signal, VM, INx PWM signal, and the voltage at one of the motor terminals? I want to understand what type of fault is being triggered.

We would like to arrive at 200/220A, wich is the best solution? -  I think we should try to understand the FAULT that is being triggered first. This way we can come up with a better solution to achieve the current you require.

Hi Pablo,

we share your strategy.

Attached  you can find the sope pictures requsted.

Moreover there are the pictures that compare FAULT and SENSOUT, because we suoppose that FAULT conditiotion is due to SENSOUT.

Hope that can help you in order to help us.

Thanks for your support.

BR

Lorenzo

SCOPE FOR TI.docx

Hi Lorenzo,

Thank you for providing the information.

It is evident from the scope shots that an OCP fault is being triggered. When the VDS of any of the FETs exceeds 1V for longer than the deglitch time of 4.5µs, the nFAULT is set low. After the retry time (~3ms) expires, the fault is cleared but is re-asserted if the OCP condition persists.  It looks like every time the retry time expires, the motor is driven for more than 1ms until OCP is triggered again. It would be interesting to look at the VDS of one of the high-side FETs. Can you take another scope shot showing the VDS of one of the high-side FETs (using a differential probe to get more accurate measurements) and the nFAULT signal. 

I have further follow up questions:

1. Are you using the same 24VDC VM for the motor driver and the H-bridge? If both voltages are different, it can cause false OCP faults. The high-side monitoring needs to be disabled to prevent the OCP fault.
2. What is the value of Idrive used in this measurement? If it is 50mA, do you have a resistor of <1Ω connected to AVDD? 

Hello Pablo,

unfortunely at the moment we don't have a scope picture that showing VDS on the HS mosfet, because the board is KO.

Regarding your new questions:

1.     We using the same 24VDC VM for the motor driver and the H-bridge.
2.     The value of Idrive used is 12.5/ 25 mA (33 kΩ ).About Idrive we tried to change
   1. RIdrive=200k (25 / 50 mA), but the outcome is worse: FAULT is acitveted at lower current motor (about 100A)
   2. RIdrive=AVDD (25 / 50 mA and HS OCPmonitoroff) as you indicated, the high side mosfet it's broken :-(

If you have other ideas are welcome and we'll try to check it.
Thanks for your support.

Regards.
Lorenzo

Lorenzo,

It seems like the OCP is getting triggered because of the large amount of current going through the FETs. One solution to get around this is to place two FETs in parallel to half the RDS(on) and allow more current to flow. If you are willing to share your schematic with me (at least  the section showing the driver circuit), I can take a look at it and provide more suggestions. You can send me the schematic via private message if you wish. Just hover the cursor over my username and click on "send private message".