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BQ76952: Schematic review for 13s

David Park
Expert 6610 points
Part Number: BQ76952
Other Parts Discussed in Thread: TIDA-010208

Hi,

Could you review the schematic for 13s?

For evaluation, if there is no load, does this circuit show normal output without any protection?

210504_13S BMS_V00.pdf

Thanks.

  • 0
    TI__Guru* 81034 points

    Hi David,

    The schematic looks pretty good. Here are my recommendations:

    • The bottom of C14 should connect to GND. This is not required, but is a best practice. During a large transient event like a short circuit, this can help prevent the VC1 voltage from being pushed below GND.
    • Some users place a small capacitor in parallel with the thermistors to filter noise. 470pF is a common value (this is the value used on the latest TI Reference Design TIDA-010208) I believe.
    • The TS2 pin is also used to wake the device from Shutdown mode. If you plan to use Shutdown mode, the datasheet recommends not connecting a thermistor to TS2. You could use the HDQ pin instead since it can also be configured as a thermistor pin (there are many multi-function pins on this device that can be used with thermistors).
    • The datasheet recommends a 10M resistor from BREG to GND if you plan to use Shutdown mode.
    • The FUSE pin can be connected to GND if unused. It can also be left open, but the FUSE status bit in the device register will toggle on and off if the pin is floating.
    • I highly recommend this document as a reference for the protection FET circuit: https://www.ti.com/lit/an/sluaa09/sluaa09.pdf It recommends individual gate resistors or ferrite beads for each FET. It also shows the switching waveforms for different gate resistor values and talks about adjusting the charge pump capacitor value if needed (this depends on the total FET capacitance). 
    • The resistors R29/R30 and R31/R32 will pull some current from the charge pump capacitor - the recommended value is 10M. 
    • The reverse charger connection circuit looks a little different than the circuit on the EVM and covered in the document I mention previously (see Section 2 of the Multiple FETs document). 

    Hope this helps.

    Best regards,

    Matt