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Original question:

USB-C PD UFP design considerations

TPS54JA20: and USB C PD TPS25750D

user6466152
Prodigy 181 points
Part Number: TPS54JA20
Other Parts Discussed in Thread: TPS25750

Hello everyone,

I'm writing this post as a follow-up to https://e2e.ti.com/support/power-management/f/196/t/967957 this, where I was guided to use TPS25750D for my USB-C Power Delivery. Now I have some questions and I want to validate my design for my university project.

I want my device to operate with the following conditions:

Input voltage 15V negotiated by USB-C

Input current 3A (I guess 45W is all I can get with 15V input)

Output Voltage: 5V, converted by the switching circuit.

Output current 8A max

I came up with this schematic: 

The questions I have are:

a) How will my USB C PD chip TPS25750D determine what voltage to select and then negotiate through USB-C? I understand that the resistors 

b) I have 6 peripheral devices. How can I isolate the 6 terminals (bottom right of the schematic) such that my devices don't interfere with each other (i.e if 3-4 devices are stopped at the same time/start at the same time, there could be a load change in the circuit and before the buck converter responds, I might get spikes/fluctuations)? Each will use a maximum of 5V 1.5A. It's possible all 6 are connected or only one is connected at a time.

Thank you for your time and I'm looking forward to your answer.

  • 0
    TI__Mastermind 23985 points

    I can help on the TPS54JA20. Connect the Rfbb to AGND.  Add a CFF and RFF in parallel with Rfbt.

    Add additional output capacitors and do not install the additional capacitors.

         Use the calc tool and schematic checklist here Link to check component values and review component connections for the TPS54JA20.

    Add bulk capacitors and ceramics near your 6 terminals for load transients.   

    Add ferrite beads on the dc lines to suppress noise. 

    Will notify the TPS25750D support on your question

  • 0 in reply to David_Daniels
    Prodigy 181 points

    Dear David,

    Thank you very much for your speedy response. For TPS54JA20 I used the TI Power Designer generated schematic here I didn't know that I should connect Rfbt to AGND, but I assume that this might be due to the fact that the GND/AGND short is placed really close to RFBT.

    Unfortunately, I do not see CFF and RFF in the design above. Could you elaborate? 

    "Add additional output capacitors and do not install the additional capacitors." - Also, could you elaborate on this? There are multiple inputs/outputs (input of TPS54JA20 is output of TPS25750D) etc - and maybe present some values? (I chose the above due to having a tested and working design that used a barrel jack to provide 12V 5A) but obviously, you have more experience than me.

    "Add bulk capacitors and ceramics near your 6 terminals for load transients" could you please suggest some values?

    "Add ferrite beads on the dc lines to suppress noise." I will read on this - I haven't had experience with ferrite beads yet (I'm a beginner designer) - could you suggest some potential values? I know that it has to support enough current and voltage through, but how does the inductance/resistance affect the circuit? Do I have to keep this further away from any components? Does this create a magnetic field that could interfere with important signals?

    Thank you very much!

  • 0 in reply to user6466152
    TI__Mastermind 32791 points

    David,

    Take a look at this link:  [FAQ] TPS25750: How do I create a Sink-Only USB-C PD port to replace a legacy Barrel Jack Connector?

    It explains exactly how to implement the TPS25750 for your application.  There are several issues with the TPS25750 implementation that you have shown.

  • 0 in reply to Chuck Branch
    Prodigy 181 points

    Dear Chuck, 

    Would it be mandatory to have the EEPROM?

    Regards,

    Mihai

  • 0 in reply to user6466152
    TI__Mastermind 32791 points

    Mihai,

    You will either need the eeprom or to have a MCU update the configuration data and use the ADCIN1 and ADCIN2 settings.

    If you wish to use a flash based MCU, It takes about 11kbytes of flash for the current configuration file, but it could grow as large as 16kbytes in the future.

  • 0 in reply to Chuck Branch
    Prodigy 181 points

    Dear Chuck,

    I have just read the instructions from https://www.ti.com/lit/ug/slvuc05/slvuc05.pdf?ts=1625126723414&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FTPS25750 and it seems like the MCU you mentioned would have to be powered and available EVERY TIME the USB C PD chip turns on - in this case it would be easier to use the EEPROM. How can I write data to the eeprom and what eeprom chip would you recommend?

    Many thanks.

    Regards,

    Mihai

  • 0 in reply to user6466152
    TI__Mastermind 32791 points

    Mihai,

    If you plan to have the eeprom, then we suggest that you add a 3 pin header to your design that includes I2Cm_SCL, I2Cm_SDA, and GND.

    With this header you can connect the board to a type C power supply to power the EEPROM and then use any available 24C eeprom programmer to program the EEPROM.

    We use the TotalPhase Aardvark extensively, but I have also used this programmer listed in the USA amazon site successfully.  https://www.amazon.com/gp/product/B07R5LPTYM/ref=ppx_yo_dt_b_search_asin_title?ie=UTF8&psc=1

    The only requirement for the programmer is that it supports the 24C eeprom format.

    Regards,

    Chuck

  • 0 in reply to user6466152
    TI__Mastermind 23985 points

    Rfbt is the high side feedback resistor.  The Rfbt will connect vout to fb pin.   The Rfbb should connect to the agnd.   See figure 21 and 56 for the schematic and example pcb layout.   The section 10.1 gives recommendations on pcb layout.   Connect the feedback network on the pgnd plane will cause problems with  noise.    Review the pcb layout,   

     Cff is in figure 21,  Rff will be in series with Cff. 

    If you are concerned with load transients, adding capacitors is a good method to employ.   

    Use a simulator, spice etc to model connecting the loads, probe the connector voltages during the hot plug.

    There are models for ferrite beads and capacitors.    A ceramic capacitor has low esr and electrolytics have higher  esr.  

    The most cost effective solution will most likely include both type of capacitors