LM25118: Schematic Review

Hi Metthew,

the link to PowerDesigner Schematic is the schematic from Webench - right?
Can you try to upload a better version this in one is almost impossible to read any value or highlight which differences you are refer to.

Can you also add some design parameters:

input voltage range

output voltage:7.5V

Output current requirement

(I RMS and I Saturation of the inductor would be good as well)

Best regards,

 Stefan

Hello Stefan,

Sorry about that issue, the following two links should have the necessary information.

Schematic

Power Designer Report

Hi Matthew,

the gain margin is very close to the limit, change the feedback voltage divider might be better 10.2k / 2k

beside that the schematic looks OK for me.

Some comments for the MSP430 (knowing this device quite well)

Are you really needing that long startup delay (10uF / 47k) ?
Note: SBW will not work with that large Resistor on RST/NMI

I recommend to add a 100nF decoupling cap for the DVcc Pin

From the signal names it looks like you would like to use SPI from UCA0 but have not used the clock pin UCA0CLK

Best regards,

 Stefan

Thank you so much for the help Stefan, I made the change to the LM25118 so that component should be complete.

I also looked over the MSP430G2553 information you provided:

Regarding the MOSI/SOMI pins that was a hold over from previously intending to use SPI but then changing to using UART but not changing the pin names out, whoops.

I added the capacitor you suggested for DVcc.

I also looked at more reference examples and a thread regarding the SBW issue (I believe that you meant the capacitor value was too large?) so I made changes that should allow me to have both a reset button still present as well as the SBW use. Perhaps you could confirm on that point? (I referenced this thread on the E2E forums)

Oops, didn't attach the new schematic.

New Schematic