TPS51116: DDR PMIC schematic design review please.

KANG KYU LEE

Prodigy 10 points

Part Number: TPS51116
Other Parts Discussed in Thread: CSD87355Q5D

TPS5116.pdf

Hi.

I designed the DDR power supply with TPS51116.

FET used BSC0921NDIATMA1, cross reference with TI's CSD87355Q5D product.

I used a small inductor because I didn't have a lot of space on the board.

I used ASPIAIG-F4020-R22M-T and have the following specifications.

ASPIAIG-F4020-R22M-T
Inductance: 220nH
TOL: 20%
CURR: 16.8A
CURR-SAT: 18.8A
DCR: 4.6mR

I wonder if there will be any problems when the circuit is configured like this.

For example, CAP capacity or frequency setting

Then, please check what is possible.

Best regards

KYU

over 3 years ago

0 Mahmoud Harmouch over 3 years ago

TI__Mastermind 28220 points

Hello,

I will review the schematic and post my comments tomorrow 10/19.

Regards

0 Mahmoud Harmouch over 3 years ago in reply to Mahmoud Harmouch

TI__Mastermind 28220 points

Hello,

I checked the schematics. With 220nH output inductor, the peak to peak current ripple is 12A and at and the boundary DCM to CCM is at 6A load current.

I have 2 questions:

1- what is the current Trip resistor value? is it 5.1 Ohms?

2- What is the power FET on resistance?

Regards

0 KANG KYU LEE over 3 years ago in reply to Mahmoud Harmouch

Prodigy 10 points

Hello,

1- what is the current Trip resistor value? is it 5.1 Ohms?
I'm not a professional power designer and the TI webench doesn't support the TPS51116.
I consulted the datasheet and reference schematic.
I changed the output CAP, inductor and FET considering the space on the board.
For 5.1 ohm resistors, use 1/10W products.

2- What is the power FET on resistance?
I'll attach the datasheet

The current notation in the schematic is a reference for the artwork pattern thickness.

Maybe I didn't understand because I'm not good at English.
If you ask a little more detail, I'll give you as much information as possible.

Best regards

KYU

TPS51116_BASE_APPLICATION.pdf BSC0921_NDI.pdf

0 Mahmoud Harmouch over 3 years ago in reply to KANG KYU LEE

TI__Mastermind 28220 points

Hello KYU,

No problem, I will check the power FET datasheet and will give comment on your schematic. What is the maximum on VDDQ_1V2 load current? The schematic shows 15A. Is it the max current? What is the maximum load on LDO VTT_0V6?

Regards

0 KANG KYU LEE over 3 years ago in reply to Mahmoud Harmouch

Prodigy 10 points

Thaks, Harmouch

I think VDDQ will use up to 8~10A. So I think it should be limited to 15A max.
We will use DDR4, so VDDQ is 1.2V and VTT is 0.6V.
I think the LDO VTT will use about 0.7A. Therefore, expect a maximum of 1-1.2A.

Regards

KYU

0 yihe over 3 years ago in reply to KANG KYU LEE

TI__Guru 66060 points

Thank you providing current. We will get back to you on the FET.

Regards

Yihe

+1 Mahmoud Harmouch over 3 years ago in reply to KANG KYU LEE

TI__Mastermind 28220 points

Hello KYU,

I reviewed the design and the power FET datasheet. The peak current at 15A(max) load current, the inductor peak current is 21A. The FET On-Resistance is The trip resistor 5mOhms(typical). The protection current should be set at higher than 21A. Use this equation to calculate the trip resistor Rtrip.

The trip voltage is higher than 15A x Rds/on = 15A x 5mOhms = 75mV

The resistance, connected from CS pin to 5V, should be higher than 75mV/10uA = 7.5 KOhms.

In your design the resistor is 5.1Ohms and should be changed to at least 7.5K. It is also good to add small cap i.e 1nF in parallel to Rtrip.

I consider this thread is resolved but please let me know for further support.

0 KANG KYU LEE over 3 years ago in reply to Mahmoud Harmouch

Prodigy 10 points

Hi. Harmouch

I was busy on a business trip, so I just checked.
I'll check by tomorrow and change the status to issue resolved if there are no further questions.

Regards

KYU

0 KANG KYU LEE over 3 years ago in reply to Mahmoud Harmouch

Prodigy 10 points

Thank you for your kind help. : )

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TPS51116: DDR PMIC schematic design review please.