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Could you pls help review the schematic diagram designing ?TPS92692QPWPRQ1.pdf
Hello Xiaofu,
Without knowing the details of the design input voltage/power levels ect. I am only going to comment of the schematic as far as power stage of the TPS92692 is concerned.
1. I do not know the reason why you would need D2 in parallel with L5.
2. R46 and R47 should be 10 Ohm
3. C67 should be 0.1uF
4. Depending on the input and output voltage range you might want to use 100V rate cap on C59
5. Your are not using the PWM dimming FEt so for certain fault condition the TPS92692 does not have the ability to disconnect the load.
Thanks Tuan