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Original question:

TPSM8A29: TPSM8A29 current limit support

TPSM8A29: Power management forum

Shiva Reddy
Prodigy 30 points
Part Number: TPSM8A29

Hi,

In the datasheet TPSM8A29 under PCB Layout Guidelines point 1 it states that "Place the input and output capacitors on the top side of the PCB. In order to shield and isolate the small signal traces from noisy power lines, insert at least one solid ground inner plane."

But in the evaluation board the output capacitors are placed on the top and bottom side of the PCB. Please suggest which one to follow?

2. Again in point 4 it states that "Pin 8 (AGND pin) must be connected to a solid PGND plane at a single point. Use the common AGND via to connect the TRIP and MODE resistors to the inner ground plane if applicable. Pin 14 is also an AGND pin, and is connected internally to pin 8. No external connection between pins 8 and 14 is required, however, pin 8 must be used as the AGND connection".

But in the 8.2 Typical Application section as per schematic the pin 8 and pin 14 are externally connected to AGND. Please suggest which one to correct?

Regards,

Shiva

  • 0
    TI__Mastermind 23665 points

    1.  The preferred placement of CIN and Cout capacitors is on the same side of device, Place CIN capacitors near the VIN and PGND pins.    For a compact design, the additional Cin and Cout capacitors can be placed on bottom side. 

    2.    Pin 8 must be used as the AGND connection.  Pin 14 is connected internally to pin 8.   No external connection between pins 8 and 14 is required.