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TPS61022: SW pin grounding issue

Part Number: TPS61022

[Update Jan. 1 2022, well the low impedance on SW is due to the low impedance of the supercap of course. I will further investigate and update this post - please do not reply to this post for now!]

Hello there,

I am using the TPS61022 for a supercap-buffered power supply application.

One of our units works great, and the supercap discharges consistently from its design voltage of 2.36V down to about 0.5V. When I measure the resistance from SW to GND, it is very high (> 1 Mohm).

On 4 other units, I measure about 0.5 ohms from SW to GND. On two of these, tests showed that the supercap gets charged only to about 0.15V. I'm wondering if the TPS61022 have been damaged due to layout issues causing e.g. high SW node ringing (as discussed in other posts, such as

https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/838912/tps61022-device-get-ruined-when-used-in-connection-with-lm2662 

https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/861563/tps61022-device-gets-shorted-very-frequently/3215362#3215362

https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/871303/tps61022-ic-get-damaged-same-times?

However, the other 2 have never been tested with an input voltage, and so should, if the laws of physics as we know them are on our side, not be damaged (but these also show low impedance from SW to GND!).

I am wondering which of the 3 cases is correct:

  1. the SW pin should or can be low impedance to GND by default, when measuring with a multimeter
  2. there is a solder problem shorting SW to GND under the chip
  3. the TPS61022 are damaged

Could you tell me if case 1 is true? I'll try to desolder one of the chips on a non-functional unit.

I'll attach a pic of the circuit. BTW: Vout connects to the 5V adapter input rail.

Thanks!

  • Hi Chester,

    I do not know what is your "default" condition. Please unpopulate the IC and re-test the impedance between SW and GND, again. If you see low impedance, then LSFET may have damage. Please share me the layout for review.

    1. the SW pin should or can be low impedance to GND by default, when measuring with a multimeter

    -Wenhao

  • Hey Wenhao,

    I confirmed with a test that the low-impedance measurement from SW to GND is not necessarily a problem. It originates from the input supercap. Testing a new unit with low impedance from SW to GND, the TPS61022 worked. However, after 2 tests under load, this unit also failed, probably from LSFET damage. Probably this is occuring when the 5V adapter input detaches and the TPS61022 has a load step from 0 to full.

    BTW, the full load condition is 5V, 600mA at the output.

    Here are some pics of my layout. Would you recommend a snubber from SW to GND?

    Kind regards

  • Hi Sir,

    Your layout is not good. The reason you see the damage is because your output loop (VOUT pin->output capacitor->GND pin) is long and thin. This will introduce excessive parasitic and cause stress to LSFET. This is a very common issue which happens to TPS61022 for a lot of cases. If you search the E2E about TPS61022 damage, you will get a lot of issue happening with same cause: improper VOUT loop.

    I would recommend you do layout change as same as what has been suggested in datasheet. For other layers, you can refer to layout in EVM user guide. After the layout has been modified, you can share the updated layout to me for review. Thanks!

    -Wenhao