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TPS543C20: Schematic Review

Jainendra Bahadur
Intellectual 490 points
Part Number: TPS543C20
Other Parts Discussed in Thread: , TPS543B20

Hi,

We have used the TPS543C20 in our design. The nominal input voltage is 5V and the output is 20A@ 0.85V.

Kindly review the attached schematic. 

Regards,

Jainendra  

QSB SCM 28032022-TPS543C20.pdf

  • 0
    TI__Guru 50855 points

     

    In the TPS543C20 product folder, under Design and Development -> Design Tools & Simulation, you will find the calculator tool "TPS543B20 TPS543C20A TPS543C20 Excel Calculator Tool and Checklist" available for down load.  - https://www.ti.com/lit/zip/slurb00 

    Please go through the design calculator and fill it out with the details of your design, then share that excel fill back here for review with your schematic and we can review the schematic.

    It would also be useful for you to review the Schematic and Layout Review power point in that zip file to look for common schematic errors and layout guidelines.

  • 0 in reply to Peter James Miller
    Intellectual 490 points

    Hi Peter,

    Thanks for your comment.

    PFA the design calculator sheet and updated schematic for review.

    FYI: We have not used Rbot resistor and EN pin is left floating.

    Layout comments will be updated later.

    Regards,

    Jainendra 

    TPS543B20_TPS543C20A_TPS543C20_Calculator.xlsx

    QSB SCM 28032022-TPS543C20_30032022.pdf

  • 0 in reply to Jainendra Bahadur
    TI__Guru 50855 points

     

    Thank you for filling out the design spreadsheet.  I have several concerns on your schematic.

    1) VDD is not connected.

    VDD must be powered to run the TPS543C20 converter.  It should be connected to PVIN and bypassed PGND with at least 1.0μF capacitor separate from the PVIN bypass capacitors.

    2) The bandwidth of the compensated converter using the listed output capacitance and RAMP selection resistor is really high and could present stability issues.  I would recommend either increasing COUT with additional parallel low-ESR output capacitors to reduce the closed loop bandwidth, or changing Rramp (R102) from 187kΩ to R121kΩ

    3) The schematic only shows 5x 22μF bypass capacitors, but the spreadsheet lists 6.  This will make item time 2 worse, but are there additional output capacitors not listed in the schematic connected to the 0V85 net on other pages of the schematic?

    4) The PGD net marker is on the BP (5.1V) side of the 100kΩ resistor (R20).  This  PGD net will not provide Power Good information.  If PGD will be used as a power good signal, it should be located on the PGOOD pin side of R20.