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Hi
The customer test with BQ76952, they found that when disconnect the C/DMOS during discharge will cause the BQ76952 unable to collect the cell voltage.
They read the battery status register and found that the POR is set. As long as the chip is restarted, it will return to normal.
This phenomenon only occurs when the MOS is disconnected in the discharge state, and it will not occur when the MOS is disconnected in the charge state.
Why the BQ76952 will POR when disconnect the MOS during discharge.
Thanks
Star
Hey Star,
I'm not sure if I understand your question. When you say "disconnect the C/DMOS" do you mean you turn it "off" (creating an open circuit)? How are you turning it off? Through DFETOFF/CFETOFF or through an MCU?
Thanks,
Caleb
Hi Caleb
Thanks for your reply.
They send commands through SPI port. During charge mode the MOS will turn off when the command receive.
In the discharge state, it is need to send several times command to turn off the MOS, and the number of commands is uncertain.
The software will read the FET Status after sending the command. If the MOS still on, it will send the command again until the MOS is OFF.
Thanks
Star
Star,
That behavior is strange. If a POR is occurring, something must be wrong with the device configuration. Can the customer share a schematic and waveforms of SPI communications from a logic analyzer? Has the customer taken a look at the SPI sample code on the product page. You can download the samples by clicking this link: https://www.ti.com/lit/zip/sluc701
Thanks,
Caleb
Hi Caleb
Thanks for your reply.
After test, they find that POR does not appear every time. It is normal to disconnect the MOS in case of low current discharge.
It is abnormal to disconnect the MOS in case of high discharge current (above 20A) discharge. In addition, it is impossible to disconnect the MOS by sending a command once, so it is need to send a command many times.
Thanks
Star
Hi Caleb
Attached the charge and discharge circuit for further analysis.
charge circuit:
discharge circuit:
full charge and discharge circuit:
Whether the repeated disconnection command is related to the grid resistance in the above figure .
If there is a large charge and discharge current, whether the grid resistance should be properly reduced.
Waiting for your reply.
Thanks
Star
Hey Star,
Can the customer try using the DFETOFF pin a few times while discharging to see if the problem still persists?
If the DFETOFF pin does not turn off the FETs, I would ask that you send a high resolution image of their CHG and DSG FET circuit so that I can better debug it.
If the DFETOFF pin does turn off the FETs, I would kindly ask that the customer share waveforms of SPI communications from a logic analyzer while they are sending the DSG_PDSG_OFF command.
Thanks,
Caleb