LM25088: Design review

Danilo A.

Mastermind 28560 points

Part Number: LM25088
Other Parts Discussed in Thread: TINA-TI, LM2990

Hi Team,

Our customer is considering the LM25088 for audio electronics application with the following specifications.

Vin: 12V to 15V
Vout: -12V
Iout min: 10mA
Iout max: 1.1A

The design will power audio electronics, so switching frequency should be at 400khz min.

Webench generated the design file below.

https://webench.ti.com/power-designer/switching-regulator/customize/170

According to our customer, he downloaded a TINA ref design from our website and modify it per the circuit in the Webench but for some reason it doesn't seems to work. Please see the TINA-TI file from our customer.

GurLM25088.TSC

He also added,

I moved forward and made an Orcad schematic and will start the layout soon. Please see attach and let me know if that looks ok to you.

Also could you please highlight the current loop path in this design, does it go through the LM25088? (The data sheet layout guide refers to positive Buck configuration so its useless for me). Any tips on the pcb layout will be greatly appreciated.

To which net the chip thermal pad should be connected in this inverting configuration. System GND or -13V?

LM25088.pdf

Regards,

Danilo

over 3 years ago

0 EricLee over 3 years ago

TI__Guru 58171 points

Hello Danilo

I cannot open the TINA-TI file. Looks like the file is corrupted.

DAP should be connected to the #6 ground pin.

Please do not allow the switching current flows through the DAP of the IC when you layout the board.

Current loop is highlighted in red and blue. Please try to make both current loop as small as possible.

I haven't checked the LM2990 circuit since the device is not under my product line. Please check the circuit separately.

Looks like these three node are not connected. please double check.

Please connect CS-CSG traces directly to the R5 current sense resistor using a kelvin-connection.

- Eric Lee

0 Danilo A. over 3 years ago in reply to EricLee

TI__Mastermind 28560 points

Hi Eric,

Here is the response of our customer.

Thank you for drawing, that will help me do a proper layout.

Attach is the Tina schematic, I saved it as Tine V7 so now it can be open with Tina-TI. Maybe you can see why the simulation does not work.

GurLM25088_v7.TSC

Regards,

Danilo

0 EricLee over 3 years ago in reply to Danilo A.

TI__Guru 58171 points

Hello Danilo

The MOSFET which was used in the GurLM25088_v7.TSC has not been defined. Please use the MOSFET in this reference circuit. https://www.ti.com/lit/tsc/snvm022

Also, please add 0.1ohm MOSFET gate resistor . This will be able to resolve a convergence error.

- Eric Lee

0 Danilo A. over 3 years ago in reply to EricLee

TI__Mastermind 28560 points

Hi Eric,

Please see the feedback of our customer below.

I made the changes suggested to GurLM25088_v7.TSC but with no success. The issue seems like it does not start to oscillate. The output seems to generate just some noise around 0V.

I'm not sure what i'm doing wrong. If it is an issue with the design or some setup with Tina.

Regards,

Danilo

0 EricLee over 3 years ago in reply to Danilo A.

TI__Guru 58171 points

Hello Danilo

Would you please simulate the attached TSC file which I modified ? It seems the GND pin of the model must be connected to the ground symbol
3582.GurLM25088_v7.TSC.

0 Danilo A. over 3 years ago in reply to EricLee

TI__Mastermind 28560 points

Hi Eric,

Our customer would like to request for your help to review their board layout below.

Negative Switcher (1).zip 1_1 amp negative switcher4 (1).brd

Thanks for your help!

Regards,

Danilo

0 EricLee over 3 years ago in reply to Danilo A.

TI__Guru 58171 points

Hello Danilo

I opened .BRD file but couldn't find any visible element in the file.

- Eric Lee

0 Danilo A. over 3 years ago in reply to EricLee

TI__Mastermind 28560 points

Hi Eric,

Here is the response of our customer.

Can you please ask him what version of Allegro he have? Mine is 16.5.

Please see the schematic diagram and board layout in pdf format below.

2273.Layout.zip

Regards,

Danilo

0 EricLee over 3 years ago in reply to Danilo A.

TI__Guru 58171 points

Hello Danilo

VIN capacitor should be located close to the VIN pin.
Don't connect CSG directly to the DAP.
R7 should be located close to the IC.
It is recommended to make switching loops as small as possible. Especially, 'M1 drain to R5 negative connection' loop should be as small as possible

- Eric Lee

0 Danilo A. over 3 years ago in reply to EricLee

TI__Mastermind 28560 points

Hi Eric,

Our customer has updated the schematic diagram and PCB layout and would like to request for another review.

Revised schematic diagram and layout.zip

Thank you!

Regards,

Danilo

0 EricLee over 3 years ago in reply to Danilo A.

TI__Guru 58171 points

Hello Danilo

It is better than the previous layout. I think the C4 negative terminal and the R5 negative terminal can be connected via the bottom layer to make the switching loop as small as possible.

- Eric Lee

0 Danilo A. over 3 years ago in reply to EricLee

TI__Mastermind 28560 points

Hi Eric,

Thank you very much for your feedback.

Our customer commented about the TINA-TI file.

I checked the modified Tina file you sent. It seems to work now however I'm unable to get the -13V out. I'm getting about -11V maximum, even if I change the Ref resistors. Not sure why.

If it is just a software glitch then please don't worry about it.

Regards,

Danilo

0 Danilo A. over 3 years ago in reply to Danilo A.

TI__Mastermind 28560 points

Hi Eric,

I just received this email from our customer.

Sorry I’m a bit confused. C4 terminals are VIN and GND, so how R5 -13V negative terminal can connect to C4?

Regards,

Danilo

0 EricLee over 3 years ago in reply to Danilo A.

TI__Guru 58171 points

Hello Danilo

Please refer the picture below. You can use vias and the bottom layer to connect R5 negative terminal.

- Eric Lee

0 EricLee over 3 years ago in reply to EricLee

TI__Guru 58171 points

Hello Danilo

About the TINA simulation, you have to increase input voltage, please supply 24V and double check.

- Eric Lee

0 Danilo A. over 3 years ago in reply to EricLee

TI__Mastermind 28560 points

Hi Eric,

Please see the comments of our customer below.

On the pcb layout, I still don’t understand what he is saying. His drawing show a connection between the negative side of R5 which is -13V and the GND plane. Isn’t that a short circuit ? Or maybe he say not to physically connect them but just bring R5 negative side physically close to GND ?

As for Tina. Yes when increasing the input voltage the output voltage does go to -13V but is that a software anomaly or will that be the case on the real hardware too? In real world my input is +13V and the switcher should produce -13V.

Regards,

Danilo

0 Danilo A. over 3 years ago in reply to Danilo A.

TI__Mastermind 28560 points

Hi Eric,

Here is another email from our customer.

I attached are drawings showing what your specialist is asking to do. I don't understand this. He ask that I connect -13V to GND?

Regards,

Danilo

0 Danilo A. over 3 years ago in reply to Danilo A.

TI__Mastermind 28560 points

Hi Eric,

May I request an update to this inquiry.

Regards,

Danilo

0 Timothy Hegarty over 3 years ago in reply to Danilo A.

TI__Guru 72702 points

Hi Danilo,

Eric is OOO at the moment, so I can try to answer.

As this is an IBB circuit, "GND" in the schematic is the positive output voltage terminal. -13V is the negative output voltage (-VOUT) terminal, so these obviously should not be connected directly. Capacitors between these nodes is advisable (effectively the output cap). Also, use ceramic caps from VIN to -VOUT as this provides the high-frequency current for the FETs.

PS: we have converters (with integrated FETs) that can do this IBB application (-12V/1.1A) easier and more efficiently, e.g. LM61430/40 36V, 3A/4A converter family.

Regards,

Tim

0 Danilo A. over 3 years ago in reply to Timothy Hegarty

TI__Mastermind 28560 points

Hi Tim,

Thank you for your comments. Here is the feedback of our customer,

I did some more homework and learn more things about the layout. I completely changed the design.

I change from 2 layers to 4 layers with bottom as a solid GND plane and layer 2 as GND too.

I made the AC loops far smaller.

There are two things though that might not be ok.

1. The Kelin connection of the reference signals now run under the MOSFET but there is a GND layer under the mosfet to isolate it. Yet i'm asuming some switching currents are passing through that ground layer too and might induce noise?

2. The VIN caps GND terminals go through VIAS to the GND plane. Are those vias enough to carry the currents.

Are all those changes are good overall or is that bad or good layout?

Please see attach files.

LM25088-1.zip

Additionally,he would like to know what is wrong with the Tina simulation and why it does not behave as expected. Have 13V in getting -13V out.

Regards,

Danilo

0 EricLee over 3 years ago in reply to Danilo A.

TI__Guru 58171 points

Hello Danilo

1. It looks okay.

2. It looks okay too.

Please consider to locate C19 between R5 and C19.

Please try to make the high-side driver switching loop as small as possible (HG-MOSFET-SW loop)

Thanks

- Eric Lee

0 Danilo A. over 3 years ago in reply to EricLee

TI__Mastermind 28560 points

Hi Eric,

Thank you for your comments. He also wants to know what is wrong with the Tina simulation and why it does not behave as expected. Have 13V in getting -13V out.

Regards,

Danilo

0 EricLee over 3 years ago in reply to Danilo A.

TI__Guru 58171 points

Hello Danilo

About the TINA simulation, you have to increase input voltage, please supply 24V because the input power supply is connected between the drain of the high-side MOSFET and the negative connection of the VOUT.

- Eric Lee

0 Danilo A. over 3 years ago in reply to EricLee

TI__Mastermind 28560 points

Hi Eric,

Please see the comment of our customer.

I'm not sure I understand this answer:

Ans. Please consider to locate C19 between R5 and C19.

Regards,

Danilo

0 EricLee over 3 years ago in reply to Danilo A.

TI__Guru 58171 points

Hi Danilo

Sorry for the typo. It should be 'locate C19 between R5 and C13'.

The high frequency noise can be observed more efficiently by placing the C19 to the switch node closer than the C13.

- Eric Lee

0 EricLee over 3 years ago in reply to EricLee

TI__Guru 58171 points

Hello
I am closing this thread since I have not heard from you for sometime.
If you are still trying to resolve the issue, please feel free to open a new thread or reopen this thread. Thanks
- Eric Lee (Applications Engineering)

0 Danilo A. over 3 years ago in reply to EricLee

TI__Mastermind 28560 points

Hi Eric,

Thank you very much for your help!

Regards,

Danilo

0 EricLee over 3 years ago in reply to Danilo A.

TI__Guru 58171 points

Thanks for promoting BSR-WV devices. Please feel free to contact me if you have any questions.
- Eric Lee (Applications Engineering)

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LM25088: Design review