LM5175: LM5175

Hi Gürcan,

Thanks for using the e2e forum.

It could be possible that one of the device protection triggers, if the output current goes higher than 6A. E.g. overcurrent protection at the CS pin.

Can you provide a schematic of your application, as well as the input voltage range?

Thank you and best regards,
Niklas

Hi Niklas, I attached the schematic. After this problem, we changed the resistor value that is between CSG and CS as 3mR and also we removed the resistor that is between Isense+ and Isense-  (we connected the pins together) so we increased current limit level. Nevertheless,  we had the same problem.   Finally after this problem, we changed the LM5175 because  we can not  seee output from the LM5175. After IC changed, we took output from the LM5175. We noticed to break down LM5175 in case of above 6.5A load.  Input voltage range is between 9-30V DC.  Thank you.

Hi Gürcan,

Thanks for the schematic and the info.
I will review the design and get back to you earlier next week.

Thank you and best regards,
Niklas

Hi Niklas,

We are waiting a feedback from you. Thank you for supporting.

Hi Gürcan,

I checked your schematic and also went through some calculations.
You are right, that the overcurrent protection should not the source of the issue, if the problem stays unchanged with the new parameters.
The inductor also should be ok with the current and should not fall into saturation.

I noticed that the slope capacitor C26 is rather small with 150pF.
I would recommend to try a out a larger cap (around 500pF should be more fitting), so the slope ramp does not get too steep during higher loads.
This is also suggested by the quickstart calculator tool, which is helpful for choosing component values and compensations in general.
It can be downloaded from the product page:
https://www.ti.com/product/LM5175#design-tools-simulation

Please let me know if this helps in fixing the problem.

Best regards,
Niklas

Thank you for feedback. Actually, you are right. But Cslope was selected 100pF instead of 235pF according to  sample calculation in the datasheet.In design stage, we used webench simulation tool. I attached the result of simulation.  According to result of simulation, Cslope was selected as 150pF.  According to datasheet cslope was calculated 544pF. Finally we will try your suggestion.8535.WBDesign16_Load Transient-1.pdf

Hi Niklas,

I attached our design calculator tool  file. According to this file, we revised component value. When input voltage adjusted 19V,  load current was seen  maximum 7A current  at 16V DC load. If load current was increased above 7A, LM5175 stopped to give the output. LM5175 was damaged.

When  we changed the IC,  it gave the output up to 7A load current. What is the reason why we can not get an output above 7A? Also we noticed  while input current was increasing, output ripple was increasing.

LM5175 Buck-Boost Quickstart Tool -- r9_02082022_deneme1.xlsm

Hello Gürcan,

Niklas is out until next week and I am busy with other tasks until the end of the week.

I am afraid we will need to keep you waiting until the beginning of next week.

Best regards,

Harry

Hi Harry,

I am waiting a feedback from you. Thank you.

Hello Gürcan,

Niklas will be back in the office today and have a look at it.

Best regards,

Harry

Hi Gürcan,

Thank you very much for the update and your patience.

If device is still not able to provide a higher output load, it would be interesting if we could see the input/output current and the voltages at the CS pin and SW pin.
Would it be possible for you to take some measurements and provide the plots?

I also checked your quickstart calculator values and noticed that the performance drops strongly for worst case scenarios, e.g. at an input voltage of 9V, the system might even get instable.

Best regards,
Niklas

LM5175 Buck-Boost Quickstart Tool -- r9_v2.1.xlsmHi Niklas,

According to LM5175 controller design tool,  we changed the  schematic design. I attaced the file. Could you check it? Is there any your suggestion?

Thank you.

Hi Gürcan,

Thanks for the update and the new sheet.
Comparing to the last quickstart calculation, the crossover frequency increases, while the phase margin got a bit smaller, right?
When operating at the example voltage of Vin 19V, there should be no problem according to the sheet. However, my point from the last answer was, that the phase margin drops rapidly when operating at a lower input voltage (you can see this by changing the voltage value in line 47 of the Bode Plot). This behavior has not changed from the last calculations.

In the meantime, does the design achieve the desired max. load, or are there still open issues from this side as well?

Thank you and best regards,
Niklas

Hi Harry,

We can get 160W (16V, 10A) output at the boost mode (input voltage: 13V), but we can not get  above 75W (16V 4.7A) at the buck mode (input voltage: 19V). Above 4.7A load, buck mosfet's gate signal is starting to degrade at 19V input. At the transition mode, buck and boost signal is starting to degrade.

How can we solve the problem?

Thank you.

Gürcan.

Hello Gürcan,

Just to avoid a misunderstanding here:

- Does the degradation happen in a simulation or on a real board?

- Can you please send screenshots of the effect that you are describing?

Thanks a lot,

Harry

Hi Harry,

The degradation happened on real board. I attached  a picture and a video. From the picture, you can see signal degradation under  4.7A load @ 16V DC  ( input 19V, 4A).  You can see signal degreadation without load at transition area from the video.

How can we decrease to this degradation?

Thank you.

Hi Gürcan,

I did not see any update from you side, therefore I hope you were able to find a solution for the problem.
If so, feel free to click the resolved button to close this issue. If not, you can reply below anytime.

Thank you and best regards,
Niklas