Hi,
I understand that the drive-strength can be altered in steps of 1/6 (so, 1/6, 2/6, 3/6, 4/6, 5/6 & 6/6) by appropriate binary values programmed into CFG8 register bits 0 to 2. The datasheet states that this “on the fly” feature requires CFG8 bit 6 (=CRC_DIS) set to 1. Does it mean if we were to utilize the drive-strength feature then CRC-check feature is not at all available during the whole of that Active session? We understand that, provided CFG8 bit6 is set to 1, CFG8 bits 0 to 2 can be repeatedly re-programmed in that whole of Active session.
Thanks
