Hello Jan,

Yes, you'd be correct that the lower the Vgs(th) is, the slower the FET turn-off.

Would it be possbile to replace the Qoff (pnp) transistor with a P-mosfet, or has this more disadvantges?
It is possible to use a P-FET instead of a PNP transistor, and actually it has been done so before. An example of this can be seen in the DSG FET circuit of our reference design using one of our battery monitors (The BQ76952), you can fine the reference design here: TIDA-010208 (Q28/D38). This is for a different device, but the logic for the turn-off circuit should be the same.

You will want to have a P-FET that has a lower Vgs(th) than that of your NMOSFETS, to ensure that the turn-off PFET is able to fully turn-off the N-FETs. 

To avoid a large inductive spike, would it be possible to put resistor in series with the transistor to regulate the turn off time?
Yes! And this is what we also do with our turn-off circuits. You can add a series resistor in your PNP/PFET transistor path in order to control and adjust the turn-off speed of the FETs. We have added resistances in our designs to do so, even in the example shared above.

If you want to see an example of an NPN turn-off circuit, you can see this in Figure 5-2. Multiple FET Test Circuit With Local Current Loops of our application note for the BQ76952: Multiple FETs with the BQ76952, BQ76942 Battery Monitors. 

Best Regards,

Luis Hernandez Salomon