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TPS65100: Current Spike Issue from LCD Module

Part Number: TPS65100


Hi Apps,

I am a TI focus account DFA in the Americas.

We have a customer in my territory that is doing a high volume embedded design using an LCD & with our TPS65100.

They have a previous locked support question here:  

https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1226150/tps65100-50-power-on-and-then-shut-down-other-50-work-perfectly-everytime?

From our customer:

We thought we had everything resolved, but recently had a couple of units apparently with the same condition.

(i.e. the TPS65100 powering up and then shutting down) 

As before, the issue ‘followed’ the LCD module (not the board) – i.e. we move the module from board-to-board and it tracks the LCD.

Unfortunately, the 2 units somehow ‘corrected’ and are no longer exhibiting the issue…

(we power cycled 100s of times, high temp, low temp, high humidity, etc – cannot ‘make’ a failure)

The questions for the TPS65100 are as follows;

Snippet of the data sheet for reference, we’re talking about VO3 output;

(our values are, VO1=8.2V, V02=-13V, VO3=15V, VCOM unused)

The problem has recurred and they have additional questions:

Thinking of the load spike on VO3 from the LCD:

  1. What is the max current SPIKE that it can provide?  I know this is dependent on the filter cap plus the rDS-on value of the FET switch…?
  2. Is there a max slew rate (i.e. mA/Sec) it can provide? i.e. what is the response time
  3. How does our VO1=8.2V affect VO3 output? (note the V01 range in the Line Regulation spec above and that we are below 10V).  The data sheet only says that the output current may be ‘higher’ than 20mA depending on the delta VO1-vs-VO3…

The charge pump is capable of supplying a minimum load current of 20 mA. Depending on the voltage difference between VO1 and VO3 higher load currents are possible.

4. How does the IC/output respond to transitioning from a negligible (almost zero) load to a light load, of say 2mA.

5. Is there any negative side to increasing the output capacitance to 10uF (or more)?

Best Regards, 

Blake Carpenter

TI DFA

  • Hi Blake,

    Previously this issue was resolved by adding more output cap on Vo3 because of its voltage drop. So did customer capture any waveform of Vo3 this time to confirm whether this issue is still caused by such drop? Could you please upload the waveform so that I can double check? Thanks

    BR

    Patrick

  • Hi Patrick,

    They really just want to know how high they can go with that cap? .22 nominal.. 4.7uf first helped.  Now they want to know what defines the upper limit? Can they safely go to 10uf?  22uf, 47uf? 100uf?

    They worry about feedback loops or current limits in the chip.

    BR

    Blake

  • Hi Blake,

    Sorry we don't have test data with larger output cap. I think we'd better to find out why there is a voltage drop on Vo3 before we propose solutions. So could you please kindly ask customer to check if this time the issue is also caused by the voltage drop on Vo3 like before?

    BR

    Patrick