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Original question:

UCC28513: The PFC function is lost above 220Vac

UCC28513: With regards to case number: CS1535952: The PFC function design review

Al Flint
Prodigy 20 points
Part Number: UCC28513
Other Parts Discussed in Thread: UCC3817, UCC2817

This is a follow-up to the case no. above.

We were able to mitigate the current distortion. But, now the PFC output voltage seems unstable under certain conditions.

The attached report summarizes the results on p162-184. Older pages are kept for reference only.
Question: At min AC input voltage and max output load, the output voltage of PFC stage is not stable. Can you please review the voltage feedback circuit and let us know what may be the cause?
Thanks,
Al & Alex
  • 0
    TI__Mastermind 28970 points

    Hello Al & Alex, 

    Thank you for your questions on the UCC28513 PFC + PWM controller. 

    There is a lot of material to digest, but limiting my analysis to slides 162-184 I think the issue of unstable PFC voltage is probably tied to the decision to connect the VAOUT compensation components from GND to VSENSE (as indicated on slide 162).  I don't think this was a good idea and I recommend that you reconnect those components back to the controller GND (pin 6).  The voltage error amplifier in UCC3817 is a conventional operational amplifier with voltage-sourcing output.  It relies on the feedback network to be connected to its inverting input (VSENSE). The error amp in UCC28513, on the other hand, is a transconductance amplifier (often called a gM amp) which has a current-sourcing output and relies on its load impedance to be connected to GND.  

    Both types of amplifiers generate an error voltage which influences the amount of current reference to be established at the MOUT signal. 
    The error voltage at both VAOUT pins contains some low frequency ripple that cannot be completely eliminated.
    When the op-amp output impedance is connected back to VSENSE (as is normal), the inverting node currents are balanced and the error-amp gain is established. 
    When the gM amp load impedance is connected back to VSENSE (which is not normal), the output ripple is fed back to the negative input at the wrong phase and interferes with operation. 

    The VAOUT signal average and ripple voltages are highest at maximum load, lowest line.  They are lowest at minimum load, high line.
    I think the poor and unstable regulation you get at max load is due to the gM output ripple being fed back to its input and interfering with the VSENSE signal. 
    At lighter loads the VAOUT signal ripple level decreases, so the feedback coupling is lower and PFC Vout can regulate better. 

    Other comments: 
    1.  Do not simply copy the compensation values of the example designs in the datasheet or reference designs.  The values of your compensation components (for your C1, R1, and C2) are specific to your design and should be determined by calculation based on the design procedure discussed in pages 19-21 of this paper: https://www.ti.com/seclit/ml/slup203/slup203.pdf.   The UCC28513 data sheet does not have an expressed design procedure for the voltage-loop compensation as does the UCC2817 data sheet.  But in fact, the procedure is nearly identical to that for UCC2817, except that all "Rin" factors in Section 8.2.2.4 are replaced by "(Vout / 7.5) / gM".   

    2.  In several slides ( such as 166-168 and others) you make a comment of "poor PF" when the input current wave shape (Ch1) is not particularly bad.  The low PF is due to significant phase-shift of the input current with respect to the input voltage.  This phase shift happens at light load and is due to displacement current from the X-caps in the EMI line filter.  The phase shift is higher at high line because the high input rms across the X-caps generates higher capacitive current than at low line.  There is nothing the PFC controller can do about the X-cap current, it can only be reduced by using lower-value X-caps (if possible). 
    Line current distortion also contributes to lower PF, but the distortion in these slides is "not so bad", relatively speaking.  It takes a lot of distortion to reduce PF significantly.

    3.  Beware of trusting your oscilloscope measurement readings without making sure that they are sensible.  In slides 165-168, the inductor current Irms readings are significantly higher than the input current Irms readings.  In slide 165, in particular, input current (Ch1) reads Irms = 162mA, while the inductor current (Ch2) reads Irms = 323mV (@1mV/mA).  Since the inductor current in a CCM boost-PFC is always very nearly equal to the input current, a reading of twice the input current value makes no sense.  

    I suggest that either the current probe conversion (measuring A, outputting volts) is wrong, or the 'scope is not properly sampling this waveform with huge amounts of high frequency ripple and noise riding on it and overstates the measurement.  

    ==> To reiterate my main point: Please reconnect the UCC28513 compensation components on pin 1 back to the controller GND (pin 6). 

    Regards,
    Ulrich